1#![allow(improper_ctypes)]
9
10#[cfg(test)]
11use stdarch_test::assert_instr;
12
13use super::*;
14
15#[doc = "CRC32 single round checksum for bytes (8 bits)."]
16#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32b)"]
17#[inline]
18#[target_feature(enable = "crc")]
19#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
20#[cfg_attr(test, assert_instr(crc32b))]
21#[cfg_attr(
22 target_arch = "arm",
23 unstable(feature = "stdarch_aarch32_crc32", issue = "125085")
24)]
25#[cfg_attr(
26 not(target_arch = "arm"),
27 stable(feature = "stdarch_aarch64_crc32", since = "1.80.0")
28)]
29pub fn __crc32b(crc: u32, data: u8) -> u32 {
30 unsafe extern "unadjusted" {
31 #[cfg_attr(
32 any(target_arch = "aarch64", target_arch = "arm64ec"),
33 link_name = "llvm.aarch64.crc32b"
34 )]
35 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32b")]
36 fn ___crc32b(crc: u32, data: u32) -> u32;
37 }
38 unsafe { ___crc32b(crc, data as u32) }
39}
40#[doc = "CRC32-C single round checksum for bytes (8 bits)."]
41#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cb)"]
42#[inline]
43#[target_feature(enable = "crc")]
44#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
45#[cfg_attr(test, assert_instr(crc32cb))]
46#[cfg_attr(
47 target_arch = "arm",
48 unstable(feature = "stdarch_aarch32_crc32", issue = "125085")
49)]
50#[cfg_attr(
51 not(target_arch = "arm"),
52 stable(feature = "stdarch_aarch64_crc32", since = "1.80.0")
53)]
54pub fn __crc32cb(crc: u32, data: u8) -> u32 {
55 unsafe extern "unadjusted" {
56 #[cfg_attr(
57 any(target_arch = "aarch64", target_arch = "arm64ec"),
58 link_name = "llvm.aarch64.crc32cb"
59 )]
60 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32cb")]
61 fn ___crc32cb(crc: u32, data: u32) -> u32;
62 }
63 unsafe { ___crc32cb(crc, data as u32) }
64}
65#[doc = "CRC32-C single round checksum for quad words (64 bits)."]
66#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cd)"]
67#[inline]
68#[target_feature(enable = "crc")]
69#[cfg(target_arch = "arm")]
70#[cfg_attr(test, assert_instr(crc32cw))]
71#[cfg_attr(
72 target_arch = "arm",
73 unstable(feature = "stdarch_aarch32_crc32", issue = "125085")
74)]
75pub fn __crc32cd(crc: u32, data: u64) -> u32 {
76 let b: u32 = (data & 0xFFFFFFFF) as u32;
77 let c: u32 = (data >> 32) as u32;
78 unsafe extern "unadjusted" {
79 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32cw")]
80 fn ___crc32cw(crc: u32, data: u32) -> u32;
81 }
82 unsafe { ___crc32cw(___crc32cw(crc, b), c) }
83}
84#[doc = "CRC32-C single round checksum for bytes (16 bits)."]
85#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32ch)"]
86#[inline]
87#[target_feature(enable = "crc")]
88#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
89#[cfg_attr(test, assert_instr(crc32ch))]
90#[cfg_attr(
91 target_arch = "arm",
92 unstable(feature = "stdarch_aarch32_crc32", issue = "125085")
93)]
94#[cfg_attr(
95 not(target_arch = "arm"),
96 stable(feature = "stdarch_aarch64_crc32", since = "1.80.0")
97)]
98pub fn __crc32ch(crc: u32, data: u16) -> u32 {
99 unsafe extern "unadjusted" {
100 #[cfg_attr(
101 any(target_arch = "aarch64", target_arch = "arm64ec"),
102 link_name = "llvm.aarch64.crc32ch"
103 )]
104 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32ch")]
105 fn ___crc32ch(crc: u32, data: u32) -> u32;
106 }
107 unsafe { ___crc32ch(crc, data as u32) }
108}
109#[doc = "CRC32-C single round checksum for bytes (32 bits)."]
110#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32cw)"]
111#[inline]
112#[target_feature(enable = "crc")]
113#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
114#[cfg_attr(test, assert_instr(crc32cw))]
115#[cfg_attr(
116 target_arch = "arm",
117 unstable(feature = "stdarch_aarch32_crc32", issue = "125085")
118)]
119#[cfg_attr(
120 not(target_arch = "arm"),
121 stable(feature = "stdarch_aarch64_crc32", since = "1.80.0")
122)]
123pub fn __crc32cw(crc: u32, data: u32) -> u32 {
124 unsafe extern "unadjusted" {
125 #[cfg_attr(
126 any(target_arch = "aarch64", target_arch = "arm64ec"),
127 link_name = "llvm.aarch64.crc32cw"
128 )]
129 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32cw")]
130 fn ___crc32cw(crc: u32, data: u32) -> u32;
131 }
132 unsafe { ___crc32cw(crc, data) }
133}
134#[doc = "CRC32 single round checksum for quad words (64 bits)."]
135#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32d)"]
136#[inline]
137#[target_feature(enable = "crc")]
138#[cfg(target_arch = "arm")]
139#[cfg_attr(test, assert_instr(crc32w))]
140#[cfg_attr(
141 target_arch = "arm",
142 unstable(feature = "stdarch_aarch32_crc32", issue = "125085")
143)]
144pub fn __crc32d(crc: u32, data: u64) -> u32 {
145 let b: u32 = (data & 0xFFFFFFFF) as u32;
146 let c: u32 = (data >> 32) as u32;
147 unsafe extern "unadjusted" {
148 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32w")]
149 fn ___crc32w(crc: u32, data: u32) -> u32;
150 }
151 unsafe { ___crc32w(___crc32w(crc, b), c) }
152}
153#[doc = "CRC32 single round checksum for bytes (16 bits)."]
154#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32h)"]
155#[inline]
156#[target_feature(enable = "crc")]
157#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
158#[cfg_attr(test, assert_instr(crc32h))]
159#[cfg_attr(
160 target_arch = "arm",
161 unstable(feature = "stdarch_aarch32_crc32", issue = "125085")
162)]
163#[cfg_attr(
164 not(target_arch = "arm"),
165 stable(feature = "stdarch_aarch64_crc32", since = "1.80.0")
166)]
167pub fn __crc32h(crc: u32, data: u16) -> u32 {
168 unsafe extern "unadjusted" {
169 #[cfg_attr(
170 any(target_arch = "aarch64", target_arch = "arm64ec"),
171 link_name = "llvm.aarch64.crc32h"
172 )]
173 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32h")]
174 fn ___crc32h(crc: u32, data: u32) -> u32;
175 }
176 unsafe { ___crc32h(crc, data as u32) }
177}
178#[doc = "CRC32 single round checksum for bytes (32 bits)."]
179#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/__crc32w)"]
180#[inline]
181#[target_feature(enable = "crc")]
182#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
183#[cfg_attr(test, assert_instr(crc32w))]
184#[cfg_attr(
185 target_arch = "arm",
186 unstable(feature = "stdarch_aarch32_crc32", issue = "125085")
187)]
188#[cfg_attr(
189 not(target_arch = "arm"),
190 stable(feature = "stdarch_aarch64_crc32", since = "1.80.0")
191)]
192pub fn __crc32w(crc: u32, data: u32) -> u32 {
193 unsafe extern "unadjusted" {
194 #[cfg_attr(
195 any(target_arch = "aarch64", target_arch = "arm64ec"),
196 link_name = "llvm.aarch64.crc32w"
197 )]
198 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.crc32w")]
199 fn ___crc32w(crc: u32, data: u32) -> u32;
200 }
201 unsafe { ___crc32w(crc, data) }
202}
203#[doc = "Signed Add and Accumulate Long Pairwise."]
204#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadal_s8)"]
205#[inline]
206#[target_feature(enable = "neon")]
207#[cfg(target_arch = "arm")]
208#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
209#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.s8"))]
210#[cfg_attr(
211 target_arch = "arm",
212 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
213)]
214fn priv_vpadal_s8(a: int16x4_t, b: int8x8_t) -> int16x4_t {
215 unsafe extern "unadjusted" {
216 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadals.v4i16.v8i8")]
217 fn _priv_vpadal_s8(a: int16x4_t, b: int8x8_t) -> int16x4_t;
218 }
219 unsafe { _priv_vpadal_s8(a, b) }
220}
221#[doc = "Signed Add and Accumulate Long Pairwise."]
222#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadalq_s8)"]
223#[inline]
224#[target_feature(enable = "neon")]
225#[cfg(target_arch = "arm")]
226#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
227#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.s8"))]
228#[cfg_attr(
229 target_arch = "arm",
230 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
231)]
232fn priv_vpadalq_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t {
233 unsafe extern "unadjusted" {
234 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadals.v8i16.v16i8")]
235 fn _priv_vpadalq_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t;
236 }
237 unsafe { _priv_vpadalq_s8(a, b) }
238}
239#[doc = "Signed Add and Accumulate Long Pairwise."]
240#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadal_s16)"]
241#[inline]
242#[target_feature(enable = "neon")]
243#[cfg(target_arch = "arm")]
244#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
245#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.s16"))]
246#[cfg_attr(
247 target_arch = "arm",
248 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
249)]
250fn priv_vpadal_s16(a: int32x2_t, b: int16x4_t) -> int32x2_t {
251 unsafe extern "unadjusted" {
252 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadals.v2i32.v4i16")]
253 fn _priv_vpadal_s16(a: int32x2_t, b: int16x4_t) -> int32x2_t;
254 }
255 unsafe { _priv_vpadal_s16(a, b) }
256}
257#[doc = "Signed Add and Accumulate Long Pairwise."]
258#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadalq_s16)"]
259#[inline]
260#[target_feature(enable = "neon")]
261#[cfg(target_arch = "arm")]
262#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
263#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.s16"))]
264#[cfg_attr(
265 target_arch = "arm",
266 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
267)]
268fn priv_vpadalq_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t {
269 unsafe extern "unadjusted" {
270 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadals.v4i32.v8i16")]
271 fn _priv_vpadalq_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t;
272 }
273 unsafe { _priv_vpadalq_s16(a, b) }
274}
275#[doc = "Signed Add and Accumulate Long Pairwise."]
276#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadal_s32)"]
277#[inline]
278#[target_feature(enable = "neon")]
279#[cfg(target_arch = "arm")]
280#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
281#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.s32"))]
282#[cfg_attr(
283 target_arch = "arm",
284 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
285)]
286fn priv_vpadal_s32(a: int64x1_t, b: int32x2_t) -> int64x1_t {
287 unsafe extern "unadjusted" {
288 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadals.v1i64.v2i32")]
289 fn _priv_vpadal_s32(a: int64x1_t, b: int32x2_t) -> int64x1_t;
290 }
291 unsafe { _priv_vpadal_s32(a, b) }
292}
293#[doc = "Signed Add and Accumulate Long Pairwise."]
294#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadalq_s32)"]
295#[inline]
296#[target_feature(enable = "neon")]
297#[cfg(target_arch = "arm")]
298#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
299#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.s32"))]
300#[cfg_attr(
301 target_arch = "arm",
302 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
303)]
304fn priv_vpadalq_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t {
305 unsafe extern "unadjusted" {
306 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadals.v2i64.v4i32")]
307 fn _priv_vpadalq_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t;
308 }
309 unsafe { _priv_vpadalq_s32(a, b) }
310}
311#[doc = "Signed Add and Accumulate Long Pairwise."]
312#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadal_u8)"]
313#[inline]
314#[target_feature(enable = "neon")]
315#[cfg(target_arch = "arm")]
316#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
317#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.u8"))]
318#[cfg_attr(
319 target_arch = "arm",
320 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
321)]
322fn priv_vpadal_u8(a: uint16x4_t, b: uint8x8_t) -> uint16x4_t {
323 unsafe extern "unadjusted" {
324 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadalu.v4i16.v8i8")]
325 fn _priv_vpadal_u8(a: uint16x4_t, b: uint8x8_t) -> uint16x4_t;
326 }
327 unsafe { _priv_vpadal_u8(a, b) }
328}
329#[doc = "Signed Add and Accumulate Long Pairwise."]
330#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadalq_u8)"]
331#[inline]
332#[target_feature(enable = "neon")]
333#[cfg(target_arch = "arm")]
334#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
335#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.u8"))]
336#[cfg_attr(
337 target_arch = "arm",
338 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
339)]
340fn priv_vpadalq_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t {
341 unsafe extern "unadjusted" {
342 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadalu.v8i16.v16i8")]
343 fn _priv_vpadalq_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t;
344 }
345 unsafe { _priv_vpadalq_u8(a, b) }
346}
347#[doc = "Signed Add and Accumulate Long Pairwise."]
348#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadal_u16)"]
349#[inline]
350#[target_feature(enable = "neon")]
351#[cfg(target_arch = "arm")]
352#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
353#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.u16"))]
354#[cfg_attr(
355 target_arch = "arm",
356 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
357)]
358fn priv_vpadal_u16(a: uint32x2_t, b: uint16x4_t) -> uint32x2_t {
359 unsafe extern "unadjusted" {
360 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadalu.v2i32.v4i16")]
361 fn _priv_vpadal_u16(a: uint32x2_t, b: uint16x4_t) -> uint32x2_t;
362 }
363 unsafe { _priv_vpadal_u16(a, b) }
364}
365#[doc = "Signed Add and Accumulate Long Pairwise."]
366#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadalq_u16)"]
367#[inline]
368#[target_feature(enable = "neon")]
369#[cfg(target_arch = "arm")]
370#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
371#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.u16"))]
372#[cfg_attr(
373 target_arch = "arm",
374 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
375)]
376fn priv_vpadalq_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t {
377 unsafe extern "unadjusted" {
378 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadalu.v4i32.v8i16")]
379 fn _priv_vpadalq_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t;
380 }
381 unsafe { _priv_vpadalq_u16(a, b) }
382}
383#[doc = "Signed Add and Accumulate Long Pairwise."]
384#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadal_u32)"]
385#[inline]
386#[target_feature(enable = "neon")]
387#[cfg(target_arch = "arm")]
388#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
389#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.u32"))]
390#[cfg_attr(
391 target_arch = "arm",
392 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
393)]
394fn priv_vpadal_u32(a: uint64x1_t, b: uint32x2_t) -> uint64x1_t {
395 unsafe extern "unadjusted" {
396 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadalu.v1i64.v2i32")]
397 fn _priv_vpadal_u32(a: uint64x1_t, b: uint32x2_t) -> uint64x1_t;
398 }
399 unsafe { _priv_vpadal_u32(a, b) }
400}
401#[doc = "Signed Add and Accumulate Long Pairwise."]
402#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/priv_vpadalq_u32)"]
403#[inline]
404#[target_feature(enable = "neon")]
405#[cfg(target_arch = "arm")]
406#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
407#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vpadal.u32"))]
408#[cfg_attr(
409 target_arch = "arm",
410 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
411)]
412fn priv_vpadalq_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t {
413 unsafe extern "unadjusted" {
414 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vpadalu.v2i64.v4i32")]
415 fn _priv_vpadalq_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t;
416 }
417 unsafe { _priv_vpadalq_u32(a, b) }
418}
419#[doc = "Absolute difference and accumulate (64-bit)"]
420#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaba_s16)"]
421#[inline]
422#[target_feature(enable = "neon")]
423#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
424#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s16"))]
425#[cfg_attr(
426 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
427 assert_instr(saba)
428)]
429#[cfg_attr(
430 not(target_arch = "arm"),
431 stable(feature = "neon_intrinsics", since = "1.59.0")
432)]
433#[cfg_attr(
434 target_arch = "arm",
435 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
436)]
437pub fn vaba_s16(a: int16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
438 unsafe { simd_add(a, vabd_s16(b, c)) }
439}
440#[doc = "Absolute difference and accumulate (64-bit)"]
441#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaba_s32)"]
442#[inline]
443#[target_feature(enable = "neon")]
444#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
445#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s32"))]
446#[cfg_attr(
447 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
448 assert_instr(saba)
449)]
450#[cfg_attr(
451 not(target_arch = "arm"),
452 stable(feature = "neon_intrinsics", since = "1.59.0")
453)]
454#[cfg_attr(
455 target_arch = "arm",
456 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
457)]
458pub fn vaba_s32(a: int32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
459 unsafe { simd_add(a, vabd_s32(b, c)) }
460}
461#[doc = "Absolute difference and accumulate (64-bit)"]
462#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaba_s8)"]
463#[inline]
464#[target_feature(enable = "neon")]
465#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
466#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s8"))]
467#[cfg_attr(
468 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
469 assert_instr(saba)
470)]
471#[cfg_attr(
472 not(target_arch = "arm"),
473 stable(feature = "neon_intrinsics", since = "1.59.0")
474)]
475#[cfg_attr(
476 target_arch = "arm",
477 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
478)]
479pub fn vaba_s8(a: int8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t {
480 unsafe { simd_add(a, vabd_s8(b, c)) }
481}
482#[doc = "Absolute difference and accumulate (64-bit)"]
483#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaba_u16)"]
484#[inline]
485#[target_feature(enable = "neon")]
486#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
487#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u16"))]
488#[cfg_attr(
489 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
490 assert_instr(uaba)
491)]
492#[cfg_attr(
493 not(target_arch = "arm"),
494 stable(feature = "neon_intrinsics", since = "1.59.0")
495)]
496#[cfg_attr(
497 target_arch = "arm",
498 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
499)]
500pub fn vaba_u16(a: uint16x4_t, b: uint16x4_t, c: uint16x4_t) -> uint16x4_t {
501 unsafe { simd_add(a, vabd_u16(b, c)) }
502}
503#[doc = "Absolute difference and accumulate (64-bit)"]
504#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaba_u32)"]
505#[inline]
506#[target_feature(enable = "neon")]
507#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
508#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u32"))]
509#[cfg_attr(
510 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
511 assert_instr(uaba)
512)]
513#[cfg_attr(
514 not(target_arch = "arm"),
515 stable(feature = "neon_intrinsics", since = "1.59.0")
516)]
517#[cfg_attr(
518 target_arch = "arm",
519 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
520)]
521pub fn vaba_u32(a: uint32x2_t, b: uint32x2_t, c: uint32x2_t) -> uint32x2_t {
522 unsafe { simd_add(a, vabd_u32(b, c)) }
523}
524#[doc = "Absolute difference and accumulate (64-bit)"]
525#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaba_u8)"]
526#[inline]
527#[target_feature(enable = "neon")]
528#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
529#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u8"))]
530#[cfg_attr(
531 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
532 assert_instr(uaba)
533)]
534#[cfg_attr(
535 not(target_arch = "arm"),
536 stable(feature = "neon_intrinsics", since = "1.59.0")
537)]
538#[cfg_attr(
539 target_arch = "arm",
540 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
541)]
542pub fn vaba_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t {
543 unsafe { simd_add(a, vabd_u8(b, c)) }
544}
545#[doc = "Signed Absolute difference and Accumulate Long"]
546#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabal_s8)"]
547#[inline]
548#[target_feature(enable = "neon")]
549#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
550#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabal.s8"))]
551#[cfg_attr(
552 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
553 assert_instr(sabal)
554)]
555#[cfg_attr(
556 not(target_arch = "arm"),
557 stable(feature = "neon_intrinsics", since = "1.59.0")
558)]
559#[cfg_attr(
560 target_arch = "arm",
561 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
562)]
563pub fn vabal_s8(a: int16x8_t, b: int8x8_t, c: int8x8_t) -> int16x8_t {
564 let d: int8x8_t = vabd_s8(b, c);
565 unsafe {
566 let e: uint8x8_t = simd_cast(d);
567 simd_add(a, simd_cast(e))
568 }
569}
570#[doc = "Signed Absolute difference and Accumulate Long"]
571#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabal_s16)"]
572#[inline]
573#[target_feature(enable = "neon")]
574#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
575#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabal.s16"))]
576#[cfg_attr(
577 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
578 assert_instr(sabal)
579)]
580#[cfg_attr(
581 not(target_arch = "arm"),
582 stable(feature = "neon_intrinsics", since = "1.59.0")
583)]
584#[cfg_attr(
585 target_arch = "arm",
586 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
587)]
588pub fn vabal_s16(a: int32x4_t, b: int16x4_t, c: int16x4_t) -> int32x4_t {
589 let d: int16x4_t = vabd_s16(b, c);
590 unsafe {
591 let e: uint16x4_t = simd_cast(d);
592 simd_add(a, simd_cast(e))
593 }
594}
595#[doc = "Signed Absolute difference and Accumulate Long"]
596#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabal_s32)"]
597#[inline]
598#[target_feature(enable = "neon")]
599#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
600#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabal.s32"))]
601#[cfg_attr(
602 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
603 assert_instr(sabal)
604)]
605#[cfg_attr(
606 not(target_arch = "arm"),
607 stable(feature = "neon_intrinsics", since = "1.59.0")
608)]
609#[cfg_attr(
610 target_arch = "arm",
611 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
612)]
613pub fn vabal_s32(a: int64x2_t, b: int32x2_t, c: int32x2_t) -> int64x2_t {
614 let d: int32x2_t = vabd_s32(b, c);
615 unsafe {
616 let e: uint32x2_t = simd_cast(d);
617 simd_add(a, simd_cast(e))
618 }
619}
620#[doc = "Unsigned Absolute difference and Accumulate Long"]
621#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabal_u8)"]
622#[inline]
623#[target_feature(enable = "neon")]
624#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
625#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabal.u8"))]
626#[cfg_attr(
627 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
628 assert_instr(uabal)
629)]
630#[cfg_attr(
631 not(target_arch = "arm"),
632 stable(feature = "neon_intrinsics", since = "1.59.0")
633)]
634#[cfg_attr(
635 target_arch = "arm",
636 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
637)]
638pub fn vabal_u8(a: uint16x8_t, b: uint8x8_t, c: uint8x8_t) -> uint16x8_t {
639 let d: uint8x8_t = vabd_u8(b, c);
640 unsafe { simd_add(a, simd_cast(d)) }
641}
642#[doc = "Unsigned Absolute difference and Accumulate Long"]
643#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabal_u16)"]
644#[inline]
645#[target_feature(enable = "neon")]
646#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
647#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabal.u16"))]
648#[cfg_attr(
649 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
650 assert_instr(uabal)
651)]
652#[cfg_attr(
653 not(target_arch = "arm"),
654 stable(feature = "neon_intrinsics", since = "1.59.0")
655)]
656#[cfg_attr(
657 target_arch = "arm",
658 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
659)]
660pub fn vabal_u16(a: uint32x4_t, b: uint16x4_t, c: uint16x4_t) -> uint32x4_t {
661 let d: uint16x4_t = vabd_u16(b, c);
662 unsafe { simd_add(a, simd_cast(d)) }
663}
664#[doc = "Unsigned Absolute difference and Accumulate Long"]
665#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabal_u32)"]
666#[inline]
667#[target_feature(enable = "neon")]
668#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
669#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabal.u32"))]
670#[cfg_attr(
671 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
672 assert_instr(uabal)
673)]
674#[cfg_attr(
675 not(target_arch = "arm"),
676 stable(feature = "neon_intrinsics", since = "1.59.0")
677)]
678#[cfg_attr(
679 target_arch = "arm",
680 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
681)]
682pub fn vabal_u32(a: uint64x2_t, b: uint32x2_t, c: uint32x2_t) -> uint64x2_t {
683 let d: uint32x2_t = vabd_u32(b, c);
684 unsafe { simd_add(a, simd_cast(d)) }
685}
686#[doc = "Absolute difference and accumulate (128-bit)"]
687#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabaq_s16)"]
688#[inline]
689#[target_feature(enable = "neon")]
690#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
691#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s16"))]
692#[cfg_attr(
693 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
694 assert_instr(saba)
695)]
696#[cfg_attr(
697 not(target_arch = "arm"),
698 stable(feature = "neon_intrinsics", since = "1.59.0")
699)]
700#[cfg_attr(
701 target_arch = "arm",
702 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
703)]
704pub fn vabaq_s16(a: int16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
705 unsafe { simd_add(a, vabdq_s16(b, c)) }
706}
707#[doc = "Absolute difference and accumulate (128-bit)"]
708#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabaq_s32)"]
709#[inline]
710#[target_feature(enable = "neon")]
711#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
712#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s32"))]
713#[cfg_attr(
714 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
715 assert_instr(saba)
716)]
717#[cfg_attr(
718 not(target_arch = "arm"),
719 stable(feature = "neon_intrinsics", since = "1.59.0")
720)]
721#[cfg_attr(
722 target_arch = "arm",
723 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
724)]
725pub fn vabaq_s32(a: int32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
726 unsafe { simd_add(a, vabdq_s32(b, c)) }
727}
728#[doc = "Absolute difference and accumulate (128-bit)"]
729#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabaq_s8)"]
730#[inline]
731#[target_feature(enable = "neon")]
732#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
733#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.s8"))]
734#[cfg_attr(
735 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
736 assert_instr(saba)
737)]
738#[cfg_attr(
739 not(target_arch = "arm"),
740 stable(feature = "neon_intrinsics", since = "1.59.0")
741)]
742#[cfg_attr(
743 target_arch = "arm",
744 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
745)]
746pub fn vabaq_s8(a: int8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t {
747 unsafe { simd_add(a, vabdq_s8(b, c)) }
748}
749#[doc = "Absolute difference and accumulate (128-bit)"]
750#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabaq_u16)"]
751#[inline]
752#[target_feature(enable = "neon")]
753#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
754#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u16"))]
755#[cfg_attr(
756 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
757 assert_instr(uaba)
758)]
759#[cfg_attr(
760 not(target_arch = "arm"),
761 stable(feature = "neon_intrinsics", since = "1.59.0")
762)]
763#[cfg_attr(
764 target_arch = "arm",
765 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
766)]
767pub fn vabaq_u16(a: uint16x8_t, b: uint16x8_t, c: uint16x8_t) -> uint16x8_t {
768 unsafe { simd_add(a, vabdq_u16(b, c)) }
769}
770#[doc = "Absolute difference and accumulate (128-bit)"]
771#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabaq_u32)"]
772#[inline]
773#[target_feature(enable = "neon")]
774#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
775#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u32"))]
776#[cfg_attr(
777 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
778 assert_instr(uaba)
779)]
780#[cfg_attr(
781 not(target_arch = "arm"),
782 stable(feature = "neon_intrinsics", since = "1.59.0")
783)]
784#[cfg_attr(
785 target_arch = "arm",
786 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
787)]
788pub fn vabaq_u32(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t) -> uint32x4_t {
789 unsafe { simd_add(a, vabdq_u32(b, c)) }
790}
791#[doc = "Absolute difference and accumulate (128-bit)"]
792#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabaq_u8)"]
793#[inline]
794#[target_feature(enable = "neon")]
795#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
796#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vaba.u8"))]
797#[cfg_attr(
798 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
799 assert_instr(uaba)
800)]
801#[cfg_attr(
802 not(target_arch = "arm"),
803 stable(feature = "neon_intrinsics", since = "1.59.0")
804)]
805#[cfg_attr(
806 target_arch = "arm",
807 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
808)]
809pub fn vabaq_u8(a: uint8x16_t, b: uint8x16_t, c: uint8x16_t) -> uint8x16_t {
810 unsafe { simd_add(a, vabdq_u8(b, c)) }
811}
812#[doc = "Absolute difference between the arguments of Floating"]
813#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabd_f16)"]
814#[inline]
815#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
816#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.f16"))]
817#[cfg_attr(
818 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
819 assert_instr(fabd)
820)]
821#[target_feature(enable = "neon,fp16")]
822#[cfg_attr(
823 not(target_arch = "arm"),
824 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
825)]
826#[cfg_attr(
827 target_arch = "arm",
828 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
829)]
830#[cfg(not(target_arch = "arm64ec"))]
831pub fn vabd_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t {
832 unsafe extern "unadjusted" {
833 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v4f16")]
834 #[cfg_attr(
835 any(target_arch = "aarch64", target_arch = "arm64ec"),
836 link_name = "llvm.aarch64.neon.fabd.v4f16"
837 )]
838 fn _vabd_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t;
839 }
840 unsafe { _vabd_f16(a, b) }
841}
842#[doc = "Absolute difference between the arguments of Floating"]
843#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdq_f16)"]
844#[inline]
845#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
846#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.f16"))]
847#[cfg_attr(
848 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
849 assert_instr(fabd)
850)]
851#[target_feature(enable = "neon,fp16")]
852#[cfg_attr(
853 not(target_arch = "arm"),
854 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
855)]
856#[cfg_attr(
857 target_arch = "arm",
858 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
859)]
860#[cfg(not(target_arch = "arm64ec"))]
861pub fn vabdq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t {
862 unsafe extern "unadjusted" {
863 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v8f16")]
864 #[cfg_attr(
865 any(target_arch = "aarch64", target_arch = "arm64ec"),
866 link_name = "llvm.aarch64.neon.fabd.v8f16"
867 )]
868 fn _vabdq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t;
869 }
870 unsafe { _vabdq_f16(a, b) }
871}
872#[doc = "Absolute difference between the arguments of Floating"]
873#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabd_f32)"]
874#[inline]
875#[target_feature(enable = "neon")]
876#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
877#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.f32"))]
878#[cfg_attr(
879 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
880 assert_instr(fabd)
881)]
882#[cfg_attr(
883 not(target_arch = "arm"),
884 stable(feature = "neon_intrinsics", since = "1.59.0")
885)]
886#[cfg_attr(
887 target_arch = "arm",
888 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
889)]
890pub fn vabd_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
891 unsafe extern "unadjusted" {
892 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v2f32")]
893 #[cfg_attr(
894 any(target_arch = "aarch64", target_arch = "arm64ec"),
895 link_name = "llvm.aarch64.neon.fabd.v2f32"
896 )]
897 fn _vabd_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t;
898 }
899 unsafe { _vabd_f32(a, b) }
900}
901#[doc = "Absolute difference between the arguments of Floating"]
902#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdq_f32)"]
903#[inline]
904#[target_feature(enable = "neon")]
905#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
906#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.f32"))]
907#[cfg_attr(
908 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
909 assert_instr(fabd)
910)]
911#[cfg_attr(
912 not(target_arch = "arm"),
913 stable(feature = "neon_intrinsics", since = "1.59.0")
914)]
915#[cfg_attr(
916 target_arch = "arm",
917 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
918)]
919pub fn vabdq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
920 unsafe extern "unadjusted" {
921 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v4f32")]
922 #[cfg_attr(
923 any(target_arch = "aarch64", target_arch = "arm64ec"),
924 link_name = "llvm.aarch64.neon.fabd.v4f32"
925 )]
926 fn _vabdq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t;
927 }
928 unsafe { _vabdq_f32(a, b) }
929}
930#[doc = "Absolute difference between the arguments"]
931#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabd_s8)"]
932#[inline]
933#[target_feature(enable = "neon")]
934#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
935#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.s8"))]
936#[cfg_attr(
937 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
938 assert_instr(sabd)
939)]
940#[cfg_attr(
941 not(target_arch = "arm"),
942 stable(feature = "neon_intrinsics", since = "1.59.0")
943)]
944#[cfg_attr(
945 target_arch = "arm",
946 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
947)]
948pub fn vabd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
949 unsafe extern "unadjusted" {
950 #[cfg_attr(
951 any(target_arch = "aarch64", target_arch = "arm64ec"),
952 link_name = "llvm.aarch64.neon.sabd.v8i8"
953 )]
954 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v8i8")]
955 fn _vabd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t;
956 }
957 unsafe { _vabd_s8(a, b) }
958}
959#[doc = "Absolute difference between the arguments"]
960#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdq_s8)"]
961#[inline]
962#[target_feature(enable = "neon")]
963#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
964#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.s8"))]
965#[cfg_attr(
966 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
967 assert_instr(sabd)
968)]
969#[cfg_attr(
970 not(target_arch = "arm"),
971 stable(feature = "neon_intrinsics", since = "1.59.0")
972)]
973#[cfg_attr(
974 target_arch = "arm",
975 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
976)]
977pub fn vabdq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
978 unsafe extern "unadjusted" {
979 #[cfg_attr(
980 any(target_arch = "aarch64", target_arch = "arm64ec"),
981 link_name = "llvm.aarch64.neon.sabd.v16i8"
982 )]
983 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v16i8")]
984 fn _vabdq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t;
985 }
986 unsafe { _vabdq_s8(a, b) }
987}
988#[doc = "Absolute difference between the arguments"]
989#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabd_s16)"]
990#[inline]
991#[target_feature(enable = "neon")]
992#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
993#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.s16"))]
994#[cfg_attr(
995 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
996 assert_instr(sabd)
997)]
998#[cfg_attr(
999 not(target_arch = "arm"),
1000 stable(feature = "neon_intrinsics", since = "1.59.0")
1001)]
1002#[cfg_attr(
1003 target_arch = "arm",
1004 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1005)]
1006pub fn vabd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
1007 unsafe extern "unadjusted" {
1008 #[cfg_attr(
1009 any(target_arch = "aarch64", target_arch = "arm64ec"),
1010 link_name = "llvm.aarch64.neon.sabd.v4i16"
1011 )]
1012 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v4i16")]
1013 fn _vabd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t;
1014 }
1015 unsafe { _vabd_s16(a, b) }
1016}
1017#[doc = "Absolute difference between the arguments"]
1018#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdq_s16)"]
1019#[inline]
1020#[target_feature(enable = "neon")]
1021#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1022#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.s16"))]
1023#[cfg_attr(
1024 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1025 assert_instr(sabd)
1026)]
1027#[cfg_attr(
1028 not(target_arch = "arm"),
1029 stable(feature = "neon_intrinsics", since = "1.59.0")
1030)]
1031#[cfg_attr(
1032 target_arch = "arm",
1033 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1034)]
1035pub fn vabdq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
1036 unsafe extern "unadjusted" {
1037 #[cfg_attr(
1038 any(target_arch = "aarch64", target_arch = "arm64ec"),
1039 link_name = "llvm.aarch64.neon.sabd.v8i16"
1040 )]
1041 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v8i16")]
1042 fn _vabdq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t;
1043 }
1044 unsafe { _vabdq_s16(a, b) }
1045}
1046#[doc = "Absolute difference between the arguments"]
1047#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabd_s32)"]
1048#[inline]
1049#[target_feature(enable = "neon")]
1050#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1051#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.s32"))]
1052#[cfg_attr(
1053 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1054 assert_instr(sabd)
1055)]
1056#[cfg_attr(
1057 not(target_arch = "arm"),
1058 stable(feature = "neon_intrinsics", since = "1.59.0")
1059)]
1060#[cfg_attr(
1061 target_arch = "arm",
1062 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1063)]
1064pub fn vabd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
1065 unsafe extern "unadjusted" {
1066 #[cfg_attr(
1067 any(target_arch = "aarch64", target_arch = "arm64ec"),
1068 link_name = "llvm.aarch64.neon.sabd.v2i32"
1069 )]
1070 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v2i32")]
1071 fn _vabd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t;
1072 }
1073 unsafe { _vabd_s32(a, b) }
1074}
1075#[doc = "Absolute difference between the arguments"]
1076#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdq_s32)"]
1077#[inline]
1078#[target_feature(enable = "neon")]
1079#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1080#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.s32"))]
1081#[cfg_attr(
1082 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1083 assert_instr(sabd)
1084)]
1085#[cfg_attr(
1086 not(target_arch = "arm"),
1087 stable(feature = "neon_intrinsics", since = "1.59.0")
1088)]
1089#[cfg_attr(
1090 target_arch = "arm",
1091 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1092)]
1093pub fn vabdq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
1094 unsafe extern "unadjusted" {
1095 #[cfg_attr(
1096 any(target_arch = "aarch64", target_arch = "arm64ec"),
1097 link_name = "llvm.aarch64.neon.sabd.v4i32"
1098 )]
1099 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabds.v4i32")]
1100 fn _vabdq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t;
1101 }
1102 unsafe { _vabdq_s32(a, b) }
1103}
1104#[doc = "Absolute difference between the arguments"]
1105#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabd_u8)"]
1106#[inline]
1107#[target_feature(enable = "neon")]
1108#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1109#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.u8"))]
1110#[cfg_attr(
1111 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1112 assert_instr(uabd)
1113)]
1114#[cfg_attr(
1115 not(target_arch = "arm"),
1116 stable(feature = "neon_intrinsics", since = "1.59.0")
1117)]
1118#[cfg_attr(
1119 target_arch = "arm",
1120 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1121)]
1122pub fn vabd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
1123 unsafe extern "unadjusted" {
1124 #[cfg_attr(
1125 any(target_arch = "aarch64", target_arch = "arm64ec"),
1126 link_name = "llvm.aarch64.neon.uabd.v8i8"
1127 )]
1128 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabdu.v8i8")]
1129 fn _vabd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t;
1130 }
1131 unsafe { _vabd_u8(a, b) }
1132}
1133#[doc = "Absolute difference between the arguments"]
1134#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdq_u8)"]
1135#[inline]
1136#[target_feature(enable = "neon")]
1137#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1138#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.u8"))]
1139#[cfg_attr(
1140 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1141 assert_instr(uabd)
1142)]
1143#[cfg_attr(
1144 not(target_arch = "arm"),
1145 stable(feature = "neon_intrinsics", since = "1.59.0")
1146)]
1147#[cfg_attr(
1148 target_arch = "arm",
1149 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1150)]
1151pub fn vabdq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
1152 unsafe extern "unadjusted" {
1153 #[cfg_attr(
1154 any(target_arch = "aarch64", target_arch = "arm64ec"),
1155 link_name = "llvm.aarch64.neon.uabd.v16i8"
1156 )]
1157 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabdu.v16i8")]
1158 fn _vabdq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t;
1159 }
1160 unsafe { _vabdq_u8(a, b) }
1161}
1162#[doc = "Absolute difference between the arguments"]
1163#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabd_u16)"]
1164#[inline]
1165#[target_feature(enable = "neon")]
1166#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1167#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.u16"))]
1168#[cfg_attr(
1169 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1170 assert_instr(uabd)
1171)]
1172#[cfg_attr(
1173 not(target_arch = "arm"),
1174 stable(feature = "neon_intrinsics", since = "1.59.0")
1175)]
1176#[cfg_attr(
1177 target_arch = "arm",
1178 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1179)]
1180pub fn vabd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
1181 unsafe extern "unadjusted" {
1182 #[cfg_attr(
1183 any(target_arch = "aarch64", target_arch = "arm64ec"),
1184 link_name = "llvm.aarch64.neon.uabd.v4i16"
1185 )]
1186 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabdu.v4i16")]
1187 fn _vabd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t;
1188 }
1189 unsafe { _vabd_u16(a, b) }
1190}
1191#[doc = "Absolute difference between the arguments"]
1192#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdq_u16)"]
1193#[inline]
1194#[target_feature(enable = "neon")]
1195#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1196#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.u16"))]
1197#[cfg_attr(
1198 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1199 assert_instr(uabd)
1200)]
1201#[cfg_attr(
1202 not(target_arch = "arm"),
1203 stable(feature = "neon_intrinsics", since = "1.59.0")
1204)]
1205#[cfg_attr(
1206 target_arch = "arm",
1207 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1208)]
1209pub fn vabdq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1210 unsafe extern "unadjusted" {
1211 #[cfg_attr(
1212 any(target_arch = "aarch64", target_arch = "arm64ec"),
1213 link_name = "llvm.aarch64.neon.uabd.v8i16"
1214 )]
1215 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabdu.v8i16")]
1216 fn _vabdq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t;
1217 }
1218 unsafe { _vabdq_u16(a, b) }
1219}
1220#[doc = "Absolute difference between the arguments"]
1221#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabd_u32)"]
1222#[inline]
1223#[target_feature(enable = "neon")]
1224#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1225#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.u32"))]
1226#[cfg_attr(
1227 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1228 assert_instr(uabd)
1229)]
1230#[cfg_attr(
1231 not(target_arch = "arm"),
1232 stable(feature = "neon_intrinsics", since = "1.59.0")
1233)]
1234#[cfg_attr(
1235 target_arch = "arm",
1236 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1237)]
1238pub fn vabd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1239 unsafe extern "unadjusted" {
1240 #[cfg_attr(
1241 any(target_arch = "aarch64", target_arch = "arm64ec"),
1242 link_name = "llvm.aarch64.neon.uabd.v2i32"
1243 )]
1244 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabdu.v2i32")]
1245 fn _vabd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t;
1246 }
1247 unsafe { _vabd_u32(a, b) }
1248}
1249#[doc = "Absolute difference between the arguments"]
1250#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdq_u32)"]
1251#[inline]
1252#[target_feature(enable = "neon")]
1253#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1254#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabd.u32"))]
1255#[cfg_attr(
1256 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1257 assert_instr(uabd)
1258)]
1259#[cfg_attr(
1260 not(target_arch = "arm"),
1261 stable(feature = "neon_intrinsics", since = "1.59.0")
1262)]
1263#[cfg_attr(
1264 target_arch = "arm",
1265 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1266)]
1267pub fn vabdq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
1268 unsafe extern "unadjusted" {
1269 #[cfg_attr(
1270 any(target_arch = "aarch64", target_arch = "arm64ec"),
1271 link_name = "llvm.aarch64.neon.uabd.v4i32"
1272 )]
1273 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vabdu.v4i32")]
1274 fn _vabdq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t;
1275 }
1276 unsafe { _vabdq_u32(a, b) }
1277}
1278#[doc = "Signed Absolute difference Long"]
1279#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_s8)"]
1280#[inline]
1281#[target_feature(enable = "neon")]
1282#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1283#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabdl.s8"))]
1284#[cfg_attr(
1285 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1286 assert_instr(sabdl)
1287)]
1288#[cfg_attr(
1289 not(target_arch = "arm"),
1290 stable(feature = "neon_intrinsics", since = "1.59.0")
1291)]
1292#[cfg_attr(
1293 target_arch = "arm",
1294 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1295)]
1296pub fn vabdl_s8(a: int8x8_t, b: int8x8_t) -> int16x8_t {
1297 unsafe {
1298 let c: uint8x8_t = simd_cast(vabd_s8(a, b));
1299 simd_cast(c)
1300 }
1301}
1302#[doc = "Signed Absolute difference Long"]
1303#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_s16)"]
1304#[inline]
1305#[target_feature(enable = "neon")]
1306#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1307#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabdl.s16"))]
1308#[cfg_attr(
1309 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1310 assert_instr(sabdl)
1311)]
1312#[cfg_attr(
1313 not(target_arch = "arm"),
1314 stable(feature = "neon_intrinsics", since = "1.59.0")
1315)]
1316#[cfg_attr(
1317 target_arch = "arm",
1318 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1319)]
1320pub fn vabdl_s16(a: int16x4_t, b: int16x4_t) -> int32x4_t {
1321 unsafe {
1322 let c: uint16x4_t = simd_cast(vabd_s16(a, b));
1323 simd_cast(c)
1324 }
1325}
1326#[doc = "Signed Absolute difference Long"]
1327#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_s32)"]
1328#[inline]
1329#[target_feature(enable = "neon")]
1330#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1331#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabdl.s32"))]
1332#[cfg_attr(
1333 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1334 assert_instr(sabdl)
1335)]
1336#[cfg_attr(
1337 not(target_arch = "arm"),
1338 stable(feature = "neon_intrinsics", since = "1.59.0")
1339)]
1340#[cfg_attr(
1341 target_arch = "arm",
1342 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1343)]
1344pub fn vabdl_s32(a: int32x2_t, b: int32x2_t) -> int64x2_t {
1345 unsafe {
1346 let c: uint32x2_t = simd_cast(vabd_s32(a, b));
1347 simd_cast(c)
1348 }
1349}
1350#[doc = "Unsigned Absolute difference Long"]
1351#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_u8)"]
1352#[inline]
1353#[target_feature(enable = "neon")]
1354#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1355#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabdl.u8"))]
1356#[cfg_attr(
1357 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1358 assert_instr(uabdl)
1359)]
1360#[cfg_attr(
1361 not(target_arch = "arm"),
1362 stable(feature = "neon_intrinsics", since = "1.59.0")
1363)]
1364#[cfg_attr(
1365 target_arch = "arm",
1366 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1367)]
1368pub fn vabdl_u8(a: uint8x8_t, b: uint8x8_t) -> uint16x8_t {
1369 unsafe { simd_cast(vabd_u8(a, b)) }
1370}
1371#[doc = "Unsigned Absolute difference Long"]
1372#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_u16)"]
1373#[inline]
1374#[target_feature(enable = "neon")]
1375#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1376#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabdl.u16"))]
1377#[cfg_attr(
1378 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1379 assert_instr(uabdl)
1380)]
1381#[cfg_attr(
1382 not(target_arch = "arm"),
1383 stable(feature = "neon_intrinsics", since = "1.59.0")
1384)]
1385#[cfg_attr(
1386 target_arch = "arm",
1387 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1388)]
1389pub fn vabdl_u16(a: uint16x4_t, b: uint16x4_t) -> uint32x4_t {
1390 unsafe { simd_cast(vabd_u16(a, b)) }
1391}
1392#[doc = "Unsigned Absolute difference Long"]
1393#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabdl_u32)"]
1394#[inline]
1395#[target_feature(enable = "neon")]
1396#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1397#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vabdl.u32"))]
1398#[cfg_attr(
1399 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1400 assert_instr(uabdl)
1401)]
1402#[cfg_attr(
1403 not(target_arch = "arm"),
1404 stable(feature = "neon_intrinsics", since = "1.59.0")
1405)]
1406#[cfg_attr(
1407 target_arch = "arm",
1408 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1409)]
1410pub fn vabdl_u32(a: uint32x2_t, b: uint32x2_t) -> uint64x2_t {
1411 unsafe { simd_cast(vabd_u32(a, b)) }
1412}
1413#[doc = "Floating-point absolute value"]
1414#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabs_f16)"]
1415#[inline]
1416#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
1417#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1418#[cfg_attr(
1419 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1420 assert_instr(fabs)
1421)]
1422#[target_feature(enable = "neon,fp16")]
1423#[cfg_attr(
1424 not(target_arch = "arm"),
1425 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
1426)]
1427#[cfg_attr(
1428 target_arch = "arm",
1429 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1430)]
1431#[cfg(not(target_arch = "arm64ec"))]
1432pub fn vabs_f16(a: float16x4_t) -> float16x4_t {
1433 unsafe { simd_fabs(a) }
1434}
1435#[doc = "Floating-point absolute value"]
1436#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_f16)"]
1437#[inline]
1438#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
1439#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1440#[cfg_attr(
1441 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1442 assert_instr(fabs)
1443)]
1444#[target_feature(enable = "neon,fp16")]
1445#[cfg_attr(
1446 not(target_arch = "arm"),
1447 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
1448)]
1449#[cfg_attr(
1450 target_arch = "arm",
1451 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1452)]
1453#[cfg(not(target_arch = "arm64ec"))]
1454pub fn vabsq_f16(a: float16x8_t) -> float16x8_t {
1455 unsafe { simd_fabs(a) }
1456}
1457#[doc = "Floating-point absolute value"]
1458#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabs_f32)"]
1459#[inline]
1460#[target_feature(enable = "neon")]
1461#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1462#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1463#[cfg_attr(
1464 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1465 assert_instr(fabs)
1466)]
1467#[cfg_attr(
1468 not(target_arch = "arm"),
1469 stable(feature = "neon_intrinsics", since = "1.59.0")
1470)]
1471#[cfg_attr(
1472 target_arch = "arm",
1473 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1474)]
1475pub fn vabs_f32(a: float32x2_t) -> float32x2_t {
1476 unsafe { simd_fabs(a) }
1477}
1478#[doc = "Floating-point absolute value"]
1479#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_f32)"]
1480#[inline]
1481#[target_feature(enable = "neon")]
1482#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1483#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1484#[cfg_attr(
1485 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1486 assert_instr(fabs)
1487)]
1488#[cfg_attr(
1489 not(target_arch = "arm"),
1490 stable(feature = "neon_intrinsics", since = "1.59.0")
1491)]
1492#[cfg_attr(
1493 target_arch = "arm",
1494 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1495)]
1496pub fn vabsq_f32(a: float32x4_t) -> float32x4_t {
1497 unsafe { simd_fabs(a) }
1498}
1499#[doc = "Absolute value (wrapping)."]
1500#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabs_s8)"]
1501#[inline]
1502#[target_feature(enable = "neon")]
1503#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1504#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1505#[cfg_attr(
1506 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1507 assert_instr(abs)
1508)]
1509#[cfg_attr(
1510 not(target_arch = "arm"),
1511 stable(feature = "neon_intrinsics", since = "1.59.0")
1512)]
1513#[cfg_attr(
1514 target_arch = "arm",
1515 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1516)]
1517pub fn vabs_s8(a: int8x8_t) -> int8x8_t {
1518 unsafe {
1519 let neg: int8x8_t = simd_neg(a);
1520 let mask: int8x8_t = simd_ge(a, neg);
1521 simd_select(mask, a, neg)
1522 }
1523}
1524#[doc = "Absolute value (wrapping)."]
1525#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_s8)"]
1526#[inline]
1527#[target_feature(enable = "neon")]
1528#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1529#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1530#[cfg_attr(
1531 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1532 assert_instr(abs)
1533)]
1534#[cfg_attr(
1535 not(target_arch = "arm"),
1536 stable(feature = "neon_intrinsics", since = "1.59.0")
1537)]
1538#[cfg_attr(
1539 target_arch = "arm",
1540 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1541)]
1542pub fn vabsq_s8(a: int8x16_t) -> int8x16_t {
1543 unsafe {
1544 let neg: int8x16_t = simd_neg(a);
1545 let mask: int8x16_t = simd_ge(a, neg);
1546 simd_select(mask, a, neg)
1547 }
1548}
1549#[doc = "Absolute value (wrapping)."]
1550#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabs_s16)"]
1551#[inline]
1552#[target_feature(enable = "neon")]
1553#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1554#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1555#[cfg_attr(
1556 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1557 assert_instr(abs)
1558)]
1559#[cfg_attr(
1560 not(target_arch = "arm"),
1561 stable(feature = "neon_intrinsics", since = "1.59.0")
1562)]
1563#[cfg_attr(
1564 target_arch = "arm",
1565 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1566)]
1567pub fn vabs_s16(a: int16x4_t) -> int16x4_t {
1568 unsafe {
1569 let neg: int16x4_t = simd_neg(a);
1570 let mask: int16x4_t = simd_ge(a, neg);
1571 simd_select(mask, a, neg)
1572 }
1573}
1574#[doc = "Absolute value (wrapping)."]
1575#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_s16)"]
1576#[inline]
1577#[target_feature(enable = "neon")]
1578#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1579#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1580#[cfg_attr(
1581 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1582 assert_instr(abs)
1583)]
1584#[cfg_attr(
1585 not(target_arch = "arm"),
1586 stable(feature = "neon_intrinsics", since = "1.59.0")
1587)]
1588#[cfg_attr(
1589 target_arch = "arm",
1590 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1591)]
1592pub fn vabsq_s16(a: int16x8_t) -> int16x8_t {
1593 unsafe {
1594 let neg: int16x8_t = simd_neg(a);
1595 let mask: int16x8_t = simd_ge(a, neg);
1596 simd_select(mask, a, neg)
1597 }
1598}
1599#[doc = "Absolute value (wrapping)."]
1600#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabs_s32)"]
1601#[inline]
1602#[target_feature(enable = "neon")]
1603#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1604#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1605#[cfg_attr(
1606 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1607 assert_instr(abs)
1608)]
1609#[cfg_attr(
1610 not(target_arch = "arm"),
1611 stable(feature = "neon_intrinsics", since = "1.59.0")
1612)]
1613#[cfg_attr(
1614 target_arch = "arm",
1615 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1616)]
1617pub fn vabs_s32(a: int32x2_t) -> int32x2_t {
1618 unsafe {
1619 let neg: int32x2_t = simd_neg(a);
1620 let mask: int32x2_t = simd_ge(a, neg);
1621 simd_select(mask, a, neg)
1622 }
1623}
1624#[doc = "Absolute value (wrapping)."]
1625#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsq_s32)"]
1626#[inline]
1627#[target_feature(enable = "neon")]
1628#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1629#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1630#[cfg_attr(
1631 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1632 assert_instr(abs)
1633)]
1634#[cfg_attr(
1635 not(target_arch = "arm"),
1636 stable(feature = "neon_intrinsics", since = "1.59.0")
1637)]
1638#[cfg_attr(
1639 target_arch = "arm",
1640 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1641)]
1642pub fn vabsq_s32(a: int32x4_t) -> int32x4_t {
1643 unsafe {
1644 let neg: int32x4_t = simd_neg(a);
1645 let mask: int32x4_t = simd_ge(a, neg);
1646 simd_select(mask, a, neg)
1647 }
1648}
1649#[doc = "Floating-point absolute value"]
1650#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vabsh_f16)"]
1651#[inline]
1652#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
1653#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vabs))]
1654#[cfg_attr(
1655 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1656 assert_instr(fabs)
1657)]
1658#[target_feature(enable = "neon,fp16")]
1659#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
1660#[cfg(not(target_arch = "arm64ec"))]
1661pub fn vabsh_f16(a: f16) -> f16 {
1662 vget_lane_f16::<0>(vabs_f16(vdup_n_f16(a)))
1663}
1664#[doc = "Floating-point Add (vector)."]
1665#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_f16)"]
1666#[inline]
1667#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
1668#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vadd.f16"))]
1669#[cfg_attr(
1670 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1671 assert_instr(fadd)
1672)]
1673#[target_feature(enable = "neon,fp16")]
1674#[cfg_attr(
1675 not(target_arch = "arm"),
1676 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
1677)]
1678#[cfg_attr(
1679 target_arch = "arm",
1680 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1681)]
1682#[cfg(not(target_arch = "arm64ec"))]
1683pub fn vadd_f16(a: float16x4_t, b: float16x4_t) -> float16x4_t {
1684 unsafe { simd_add(a, b) }
1685}
1686#[doc = "Floating-point Add (vector)."]
1687#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_f16)"]
1688#[inline]
1689#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
1690#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vadd.f16"))]
1691#[cfg_attr(
1692 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1693 assert_instr(fadd)
1694)]
1695#[target_feature(enable = "neon,fp16")]
1696#[cfg_attr(
1697 not(target_arch = "arm"),
1698 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
1699)]
1700#[cfg_attr(
1701 target_arch = "arm",
1702 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1703)]
1704#[cfg(not(target_arch = "arm64ec"))]
1705pub fn vaddq_f16(a: float16x8_t, b: float16x8_t) -> float16x8_t {
1706 unsafe { simd_add(a, b) }
1707}
1708#[doc = "Vector add."]
1709#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_f32)"]
1710#[inline]
1711#[target_feature(enable = "neon")]
1712#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1713#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1714#[cfg_attr(
1715 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1716 assert_instr(fadd)
1717)]
1718#[cfg_attr(
1719 not(target_arch = "arm"),
1720 stable(feature = "neon_intrinsics", since = "1.59.0")
1721)]
1722#[cfg_attr(
1723 target_arch = "arm",
1724 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1725)]
1726pub fn vadd_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t {
1727 unsafe { simd_add(a, b) }
1728}
1729#[doc = "Vector add."]
1730#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_s16)"]
1731#[inline]
1732#[target_feature(enable = "neon")]
1733#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1734#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1735#[cfg_attr(
1736 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1737 assert_instr(add)
1738)]
1739#[cfg_attr(
1740 not(target_arch = "arm"),
1741 stable(feature = "neon_intrinsics", since = "1.59.0")
1742)]
1743#[cfg_attr(
1744 target_arch = "arm",
1745 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1746)]
1747pub fn vadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
1748 unsafe { simd_add(a, b) }
1749}
1750#[doc = "Vector add."]
1751#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_s32)"]
1752#[inline]
1753#[target_feature(enable = "neon")]
1754#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1755#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1756#[cfg_attr(
1757 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1758 assert_instr(add)
1759)]
1760#[cfg_attr(
1761 not(target_arch = "arm"),
1762 stable(feature = "neon_intrinsics", since = "1.59.0")
1763)]
1764#[cfg_attr(
1765 target_arch = "arm",
1766 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1767)]
1768pub fn vadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
1769 unsafe { simd_add(a, b) }
1770}
1771#[doc = "Vector add."]
1772#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_s8)"]
1773#[inline]
1774#[target_feature(enable = "neon")]
1775#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1776#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1777#[cfg_attr(
1778 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1779 assert_instr(add)
1780)]
1781#[cfg_attr(
1782 not(target_arch = "arm"),
1783 stable(feature = "neon_intrinsics", since = "1.59.0")
1784)]
1785#[cfg_attr(
1786 target_arch = "arm",
1787 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1788)]
1789pub fn vadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
1790 unsafe { simd_add(a, b) }
1791}
1792#[doc = "Vector add."]
1793#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_u16)"]
1794#[inline]
1795#[target_feature(enable = "neon")]
1796#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1797#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1798#[cfg_attr(
1799 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1800 assert_instr(add)
1801)]
1802#[cfg_attr(
1803 not(target_arch = "arm"),
1804 stable(feature = "neon_intrinsics", since = "1.59.0")
1805)]
1806#[cfg_attr(
1807 target_arch = "arm",
1808 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1809)]
1810pub fn vadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
1811 unsafe { simd_add(a, b) }
1812}
1813#[doc = "Vector add."]
1814#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_u32)"]
1815#[inline]
1816#[target_feature(enable = "neon")]
1817#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1818#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1819#[cfg_attr(
1820 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1821 assert_instr(add)
1822)]
1823#[cfg_attr(
1824 not(target_arch = "arm"),
1825 stable(feature = "neon_intrinsics", since = "1.59.0")
1826)]
1827#[cfg_attr(
1828 target_arch = "arm",
1829 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1830)]
1831pub fn vadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
1832 unsafe { simd_add(a, b) }
1833}
1834#[doc = "Vector add."]
1835#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_u8)"]
1836#[inline]
1837#[target_feature(enable = "neon")]
1838#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1839#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1840#[cfg_attr(
1841 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1842 assert_instr(add)
1843)]
1844#[cfg_attr(
1845 not(target_arch = "arm"),
1846 stable(feature = "neon_intrinsics", since = "1.59.0")
1847)]
1848#[cfg_attr(
1849 target_arch = "arm",
1850 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1851)]
1852pub fn vadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
1853 unsafe { simd_add(a, b) }
1854}
1855#[doc = "Vector add."]
1856#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_f32)"]
1857#[inline]
1858#[target_feature(enable = "neon")]
1859#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1860#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1861#[cfg_attr(
1862 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1863 assert_instr(fadd)
1864)]
1865#[cfg_attr(
1866 not(target_arch = "arm"),
1867 stable(feature = "neon_intrinsics", since = "1.59.0")
1868)]
1869#[cfg_attr(
1870 target_arch = "arm",
1871 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1872)]
1873pub fn vaddq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t {
1874 unsafe { simd_add(a, b) }
1875}
1876#[doc = "Vector add."]
1877#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_s16)"]
1878#[inline]
1879#[target_feature(enable = "neon")]
1880#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1881#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1882#[cfg_attr(
1883 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1884 assert_instr(add)
1885)]
1886#[cfg_attr(
1887 not(target_arch = "arm"),
1888 stable(feature = "neon_intrinsics", since = "1.59.0")
1889)]
1890#[cfg_attr(
1891 target_arch = "arm",
1892 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1893)]
1894pub fn vaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
1895 unsafe { simd_add(a, b) }
1896}
1897#[doc = "Vector add."]
1898#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_s32)"]
1899#[inline]
1900#[target_feature(enable = "neon")]
1901#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1902#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1903#[cfg_attr(
1904 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1905 assert_instr(add)
1906)]
1907#[cfg_attr(
1908 not(target_arch = "arm"),
1909 stable(feature = "neon_intrinsics", since = "1.59.0")
1910)]
1911#[cfg_attr(
1912 target_arch = "arm",
1913 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1914)]
1915pub fn vaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
1916 unsafe { simd_add(a, b) }
1917}
1918#[doc = "Vector add."]
1919#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_s64)"]
1920#[inline]
1921#[target_feature(enable = "neon")]
1922#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1923#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1924#[cfg_attr(
1925 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1926 assert_instr(add)
1927)]
1928#[cfg_attr(
1929 not(target_arch = "arm"),
1930 stable(feature = "neon_intrinsics", since = "1.59.0")
1931)]
1932#[cfg_attr(
1933 target_arch = "arm",
1934 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1935)]
1936pub fn vaddq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
1937 unsafe { simd_add(a, b) }
1938}
1939#[doc = "Vector add."]
1940#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_s8)"]
1941#[inline]
1942#[target_feature(enable = "neon")]
1943#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1944#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1945#[cfg_attr(
1946 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1947 assert_instr(add)
1948)]
1949#[cfg_attr(
1950 not(target_arch = "arm"),
1951 stable(feature = "neon_intrinsics", since = "1.59.0")
1952)]
1953#[cfg_attr(
1954 target_arch = "arm",
1955 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1956)]
1957pub fn vaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
1958 unsafe { simd_add(a, b) }
1959}
1960#[doc = "Vector add."]
1961#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_u16)"]
1962#[inline]
1963#[target_feature(enable = "neon")]
1964#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1965#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1966#[cfg_attr(
1967 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1968 assert_instr(add)
1969)]
1970#[cfg_attr(
1971 not(target_arch = "arm"),
1972 stable(feature = "neon_intrinsics", since = "1.59.0")
1973)]
1974#[cfg_attr(
1975 target_arch = "arm",
1976 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1977)]
1978pub fn vaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
1979 unsafe { simd_add(a, b) }
1980}
1981#[doc = "Vector add."]
1982#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_u32)"]
1983#[inline]
1984#[target_feature(enable = "neon")]
1985#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
1986#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
1987#[cfg_attr(
1988 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
1989 assert_instr(add)
1990)]
1991#[cfg_attr(
1992 not(target_arch = "arm"),
1993 stable(feature = "neon_intrinsics", since = "1.59.0")
1994)]
1995#[cfg_attr(
1996 target_arch = "arm",
1997 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
1998)]
1999pub fn vaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
2000 unsafe { simd_add(a, b) }
2001}
2002#[doc = "Vector add."]
2003#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_u64)"]
2004#[inline]
2005#[target_feature(enable = "neon")]
2006#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2007#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2008#[cfg_attr(
2009 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2010 assert_instr(add)
2011)]
2012#[cfg_attr(
2013 not(target_arch = "arm"),
2014 stable(feature = "neon_intrinsics", since = "1.59.0")
2015)]
2016#[cfg_attr(
2017 target_arch = "arm",
2018 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2019)]
2020pub fn vaddq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
2021 unsafe { simd_add(a, b) }
2022}
2023#[doc = "Vector add."]
2024#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_u8)"]
2025#[inline]
2026#[target_feature(enable = "neon")]
2027#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2028#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vadd))]
2029#[cfg_attr(
2030 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2031 assert_instr(add)
2032)]
2033#[cfg_attr(
2034 not(target_arch = "arm"),
2035 stable(feature = "neon_intrinsics", since = "1.59.0")
2036)]
2037#[cfg_attr(
2038 target_arch = "arm",
2039 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2040)]
2041pub fn vaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
2042 unsafe { simd_add(a, b) }
2043}
2044#[doc = "Bitwise exclusive OR"]
2045#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_p8)"]
2046#[inline]
2047#[target_feature(enable = "neon")]
2048#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2049#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
2050#[cfg_attr(
2051 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2052 assert_instr(nop)
2053)]
2054#[cfg_attr(
2055 not(target_arch = "arm"),
2056 stable(feature = "neon_intrinsics", since = "1.59.0")
2057)]
2058#[cfg_attr(
2059 target_arch = "arm",
2060 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2061)]
2062pub fn vadd_p8(a: poly8x8_t, b: poly8x8_t) -> poly8x8_t {
2063 unsafe { simd_xor(a, b) }
2064}
2065#[doc = "Bitwise exclusive OR"]
2066#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_p8)"]
2067#[inline]
2068#[target_feature(enable = "neon")]
2069#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2070#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
2071#[cfg_attr(
2072 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2073 assert_instr(nop)
2074)]
2075#[cfg_attr(
2076 not(target_arch = "arm"),
2077 stable(feature = "neon_intrinsics", since = "1.59.0")
2078)]
2079#[cfg_attr(
2080 target_arch = "arm",
2081 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2082)]
2083pub fn vaddq_p8(a: poly8x16_t, b: poly8x16_t) -> poly8x16_t {
2084 unsafe { simd_xor(a, b) }
2085}
2086#[doc = "Bitwise exclusive OR"]
2087#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_p16)"]
2088#[inline]
2089#[target_feature(enable = "neon")]
2090#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2091#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
2092#[cfg_attr(
2093 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2094 assert_instr(nop)
2095)]
2096#[cfg_attr(
2097 not(target_arch = "arm"),
2098 stable(feature = "neon_intrinsics", since = "1.59.0")
2099)]
2100#[cfg_attr(
2101 target_arch = "arm",
2102 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2103)]
2104pub fn vadd_p16(a: poly16x4_t, b: poly16x4_t) -> poly16x4_t {
2105 unsafe { simd_xor(a, b) }
2106}
2107#[doc = "Bitwise exclusive OR"]
2108#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_p16)"]
2109#[inline]
2110#[target_feature(enable = "neon")]
2111#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2112#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
2113#[cfg_attr(
2114 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2115 assert_instr(nop)
2116)]
2117#[cfg_attr(
2118 not(target_arch = "arm"),
2119 stable(feature = "neon_intrinsics", since = "1.59.0")
2120)]
2121#[cfg_attr(
2122 target_arch = "arm",
2123 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2124)]
2125pub fn vaddq_p16(a: poly16x8_t, b: poly16x8_t) -> poly16x8_t {
2126 unsafe { simd_xor(a, b) }
2127}
2128#[doc = "Bitwise exclusive OR"]
2129#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vadd_p64)"]
2130#[inline]
2131#[target_feature(enable = "neon")]
2132#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2133#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
2134#[cfg_attr(
2135 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2136 assert_instr(nop)
2137)]
2138#[cfg_attr(
2139 not(target_arch = "arm"),
2140 stable(feature = "neon_intrinsics", since = "1.59.0")
2141)]
2142#[cfg_attr(
2143 target_arch = "arm",
2144 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2145)]
2146pub fn vadd_p64(a: poly64x1_t, b: poly64x1_t) -> poly64x1_t {
2147 unsafe { simd_xor(a, b) }
2148}
2149#[doc = "Bitwise exclusive OR"]
2150#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_p64)"]
2151#[inline]
2152#[target_feature(enable = "neon")]
2153#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2154#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
2155#[cfg_attr(
2156 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2157 assert_instr(nop)
2158)]
2159#[cfg_attr(
2160 not(target_arch = "arm"),
2161 stable(feature = "neon_intrinsics", since = "1.59.0")
2162)]
2163#[cfg_attr(
2164 target_arch = "arm",
2165 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2166)]
2167pub fn vaddq_p64(a: poly64x2_t, b: poly64x2_t) -> poly64x2_t {
2168 unsafe { simd_xor(a, b) }
2169}
2170#[doc = "Add"]
2171#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddh_f16)"]
2172#[inline]
2173#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
2174#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vadd.f16"))]
2175#[cfg_attr(
2176 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2177 assert_instr(fadd)
2178)]
2179#[target_feature(enable = "neon,fp16")]
2180#[unstable(feature = "stdarch_neon_f16", issue = "136306")]
2181#[cfg(not(target_arch = "arm64ec"))]
2182pub fn vaddh_f16(a: f16, b: f16) -> f16 {
2183 a + b
2184}
2185#[doc = "Add returning High Narrow (high half)."]
2186#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_high_s16)"]
2187#[inline]
2188#[target_feature(enable = "neon")]
2189#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2190#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2191#[cfg_attr(
2192 all(
2193 test,
2194 any(target_arch = "aarch64", target_arch = "arm64ec"),
2195 target_endian = "little"
2196 ),
2197 assert_instr(addhn2)
2198)]
2199#[cfg_attr(
2200 not(target_arch = "arm"),
2201 stable(feature = "neon_intrinsics", since = "1.59.0")
2202)]
2203#[cfg_attr(
2204 target_arch = "arm",
2205 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2206)]
2207pub fn vaddhn_high_s16(r: int8x8_t, a: int16x8_t, b: int16x8_t) -> int8x16_t {
2208 unsafe {
2209 let x = simd_cast(simd_shr(simd_add(a, b), int16x8_t::splat(8)));
2210 vcombine_s8(r, x)
2211 }
2212}
2213#[doc = "Add returning High Narrow (high half)."]
2214#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_high_s32)"]
2215#[inline]
2216#[target_feature(enable = "neon")]
2217#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2218#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2219#[cfg_attr(
2220 all(
2221 test,
2222 any(target_arch = "aarch64", target_arch = "arm64ec"),
2223 target_endian = "little"
2224 ),
2225 assert_instr(addhn2)
2226)]
2227#[cfg_attr(
2228 not(target_arch = "arm"),
2229 stable(feature = "neon_intrinsics", since = "1.59.0")
2230)]
2231#[cfg_attr(
2232 target_arch = "arm",
2233 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2234)]
2235pub fn vaddhn_high_s32(r: int16x4_t, a: int32x4_t, b: int32x4_t) -> int16x8_t {
2236 unsafe {
2237 let x = simd_cast(simd_shr(simd_add(a, b), int32x4_t::splat(16)));
2238 vcombine_s16(r, x)
2239 }
2240}
2241#[doc = "Add returning High Narrow (high half)."]
2242#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_high_s64)"]
2243#[inline]
2244#[target_feature(enable = "neon")]
2245#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2246#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2247#[cfg_attr(
2248 all(
2249 test,
2250 any(target_arch = "aarch64", target_arch = "arm64ec"),
2251 target_endian = "little"
2252 ),
2253 assert_instr(addhn2)
2254)]
2255#[cfg_attr(
2256 not(target_arch = "arm"),
2257 stable(feature = "neon_intrinsics", since = "1.59.0")
2258)]
2259#[cfg_attr(
2260 target_arch = "arm",
2261 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2262)]
2263pub fn vaddhn_high_s64(r: int32x2_t, a: int64x2_t, b: int64x2_t) -> int32x4_t {
2264 unsafe {
2265 let x = simd_cast(simd_shr(simd_add(a, b), int64x2_t::splat(32)));
2266 vcombine_s32(r, x)
2267 }
2268}
2269#[doc = "Add returning High Narrow (high half)."]
2270#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_high_u16)"]
2271#[inline]
2272#[target_feature(enable = "neon")]
2273#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2274#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2275#[cfg_attr(
2276 all(
2277 test,
2278 any(target_arch = "aarch64", target_arch = "arm64ec"),
2279 target_endian = "little"
2280 ),
2281 assert_instr(addhn2)
2282)]
2283#[cfg_attr(
2284 not(target_arch = "arm"),
2285 stable(feature = "neon_intrinsics", since = "1.59.0")
2286)]
2287#[cfg_attr(
2288 target_arch = "arm",
2289 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2290)]
2291pub fn vaddhn_high_u16(r: uint8x8_t, a: uint16x8_t, b: uint16x8_t) -> uint8x16_t {
2292 unsafe {
2293 let x = simd_cast(simd_shr(simd_add(a, b), uint16x8_t::splat(8)));
2294 vcombine_u8(r, x)
2295 }
2296}
2297#[doc = "Add returning High Narrow (high half)."]
2298#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_high_u32)"]
2299#[inline]
2300#[target_feature(enable = "neon")]
2301#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2302#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2303#[cfg_attr(
2304 all(
2305 test,
2306 any(target_arch = "aarch64", target_arch = "arm64ec"),
2307 target_endian = "little"
2308 ),
2309 assert_instr(addhn2)
2310)]
2311#[cfg_attr(
2312 not(target_arch = "arm"),
2313 stable(feature = "neon_intrinsics", since = "1.59.0")
2314)]
2315#[cfg_attr(
2316 target_arch = "arm",
2317 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2318)]
2319pub fn vaddhn_high_u32(r: uint16x4_t, a: uint32x4_t, b: uint32x4_t) -> uint16x8_t {
2320 unsafe {
2321 let x = simd_cast(simd_shr(simd_add(a, b), uint32x4_t::splat(16)));
2322 vcombine_u16(r, x)
2323 }
2324}
2325#[doc = "Add returning High Narrow (high half)."]
2326#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_high_u64)"]
2327#[inline]
2328#[target_feature(enable = "neon")]
2329#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2330#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2331#[cfg_attr(
2332 all(
2333 test,
2334 any(target_arch = "aarch64", target_arch = "arm64ec"),
2335 target_endian = "little"
2336 ),
2337 assert_instr(addhn2)
2338)]
2339#[cfg_attr(
2340 not(target_arch = "arm"),
2341 stable(feature = "neon_intrinsics", since = "1.59.0")
2342)]
2343#[cfg_attr(
2344 target_arch = "arm",
2345 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2346)]
2347pub fn vaddhn_high_u64(r: uint32x2_t, a: uint64x2_t, b: uint64x2_t) -> uint32x4_t {
2348 unsafe {
2349 let x = simd_cast(simd_shr(simd_add(a, b), uint64x2_t::splat(32)));
2350 vcombine_u32(r, x)
2351 }
2352}
2353#[doc = "Add returning High Narrow."]
2354#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_s16)"]
2355#[inline]
2356#[target_feature(enable = "neon")]
2357#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2358#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2359#[cfg_attr(
2360 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2361 assert_instr(addhn)
2362)]
2363#[cfg_attr(
2364 not(target_arch = "arm"),
2365 stable(feature = "neon_intrinsics", since = "1.59.0")
2366)]
2367#[cfg_attr(
2368 target_arch = "arm",
2369 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2370)]
2371pub fn vaddhn_s16(a: int16x8_t, b: int16x8_t) -> int8x8_t {
2372 unsafe { simd_cast(simd_shr(simd_add(a, b), int16x8_t::splat(8))) }
2373}
2374#[doc = "Add returning High Narrow."]
2375#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_s32)"]
2376#[inline]
2377#[target_feature(enable = "neon")]
2378#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2379#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2380#[cfg_attr(
2381 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2382 assert_instr(addhn)
2383)]
2384#[cfg_attr(
2385 not(target_arch = "arm"),
2386 stable(feature = "neon_intrinsics", since = "1.59.0")
2387)]
2388#[cfg_attr(
2389 target_arch = "arm",
2390 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2391)]
2392pub fn vaddhn_s32(a: int32x4_t, b: int32x4_t) -> int16x4_t {
2393 unsafe { simd_cast(simd_shr(simd_add(a, b), int32x4_t::splat(16))) }
2394}
2395#[doc = "Add returning High Narrow."]
2396#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_s64)"]
2397#[inline]
2398#[target_feature(enable = "neon")]
2399#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2400#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2401#[cfg_attr(
2402 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2403 assert_instr(addhn)
2404)]
2405#[cfg_attr(
2406 not(target_arch = "arm"),
2407 stable(feature = "neon_intrinsics", since = "1.59.0")
2408)]
2409#[cfg_attr(
2410 target_arch = "arm",
2411 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2412)]
2413pub fn vaddhn_s64(a: int64x2_t, b: int64x2_t) -> int32x2_t {
2414 unsafe { simd_cast(simd_shr(simd_add(a, b), int64x2_t::splat(32))) }
2415}
2416#[doc = "Add returning High Narrow."]
2417#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_u16)"]
2418#[inline]
2419#[target_feature(enable = "neon")]
2420#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2421#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2422#[cfg_attr(
2423 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2424 assert_instr(addhn)
2425)]
2426#[cfg_attr(
2427 not(target_arch = "arm"),
2428 stable(feature = "neon_intrinsics", since = "1.59.0")
2429)]
2430#[cfg_attr(
2431 target_arch = "arm",
2432 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2433)]
2434pub fn vaddhn_u16(a: uint16x8_t, b: uint16x8_t) -> uint8x8_t {
2435 unsafe { simd_cast(simd_shr(simd_add(a, b), uint16x8_t::splat(8))) }
2436}
2437#[doc = "Add returning High Narrow."]
2438#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_u32)"]
2439#[inline]
2440#[target_feature(enable = "neon")]
2441#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2442#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2443#[cfg_attr(
2444 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2445 assert_instr(addhn)
2446)]
2447#[cfg_attr(
2448 not(target_arch = "arm"),
2449 stable(feature = "neon_intrinsics", since = "1.59.0")
2450)]
2451#[cfg_attr(
2452 target_arch = "arm",
2453 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2454)]
2455pub fn vaddhn_u32(a: uint32x4_t, b: uint32x4_t) -> uint16x4_t {
2456 unsafe { simd_cast(simd_shr(simd_add(a, b), uint32x4_t::splat(16))) }
2457}
2458#[doc = "Add returning High Narrow."]
2459#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddhn_u64)"]
2460#[inline]
2461#[target_feature(enable = "neon")]
2462#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2463#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddhn))]
2464#[cfg_attr(
2465 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2466 assert_instr(addhn)
2467)]
2468#[cfg_attr(
2469 not(target_arch = "arm"),
2470 stable(feature = "neon_intrinsics", since = "1.59.0")
2471)]
2472#[cfg_attr(
2473 target_arch = "arm",
2474 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2475)]
2476pub fn vaddhn_u64(a: uint64x2_t, b: uint64x2_t) -> uint32x2_t {
2477 unsafe { simd_cast(simd_shr(simd_add(a, b), uint64x2_t::splat(32))) }
2478}
2479#[doc = "Signed Add Long (vector, high half)."]
2480#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_high_s16)"]
2481#[inline]
2482#[target_feature(enable = "neon")]
2483#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2484#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2485#[cfg_attr(
2486 all(
2487 test,
2488 any(target_arch = "aarch64", target_arch = "arm64ec"),
2489 target_endian = "little"
2490 ),
2491 assert_instr(saddl2)
2492)]
2493#[cfg_attr(
2494 not(target_arch = "arm"),
2495 stable(feature = "neon_intrinsics", since = "1.59.0")
2496)]
2497#[cfg_attr(
2498 target_arch = "arm",
2499 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2500)]
2501pub fn vaddl_high_s16(a: int16x8_t, b: int16x8_t) -> int32x4_t {
2502 let a: int16x4_t = vget_high_s16(a);
2503 let b: int16x4_t = vget_high_s16(b);
2504 unsafe {
2505 let a: int32x4_t = simd_cast(a);
2506 let b: int32x4_t = simd_cast(b);
2507 simd_add(a, b)
2508 }
2509}
2510#[doc = "Signed Add Long (vector, high half)."]
2511#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_high_s32)"]
2512#[inline]
2513#[target_feature(enable = "neon")]
2514#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2515#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2516#[cfg_attr(
2517 all(
2518 test,
2519 any(target_arch = "aarch64", target_arch = "arm64ec"),
2520 target_endian = "little"
2521 ),
2522 assert_instr(saddl2)
2523)]
2524#[cfg_attr(
2525 not(target_arch = "arm"),
2526 stable(feature = "neon_intrinsics", since = "1.59.0")
2527)]
2528#[cfg_attr(
2529 target_arch = "arm",
2530 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2531)]
2532pub fn vaddl_high_s32(a: int32x4_t, b: int32x4_t) -> int64x2_t {
2533 let a: int32x2_t = vget_high_s32(a);
2534 let b: int32x2_t = vget_high_s32(b);
2535 unsafe {
2536 let a: int64x2_t = simd_cast(a);
2537 let b: int64x2_t = simd_cast(b);
2538 simd_add(a, b)
2539 }
2540}
2541#[doc = "Signed Add Long (vector, high half)."]
2542#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_high_s8)"]
2543#[inline]
2544#[target_feature(enable = "neon")]
2545#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2546#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2547#[cfg_attr(
2548 all(
2549 test,
2550 any(target_arch = "aarch64", target_arch = "arm64ec"),
2551 target_endian = "little"
2552 ),
2553 assert_instr(saddl2)
2554)]
2555#[cfg_attr(
2556 not(target_arch = "arm"),
2557 stable(feature = "neon_intrinsics", since = "1.59.0")
2558)]
2559#[cfg_attr(
2560 target_arch = "arm",
2561 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2562)]
2563pub fn vaddl_high_s8(a: int8x16_t, b: int8x16_t) -> int16x8_t {
2564 let a: int8x8_t = vget_high_s8(a);
2565 let b: int8x8_t = vget_high_s8(b);
2566 unsafe {
2567 let a: int16x8_t = simd_cast(a);
2568 let b: int16x8_t = simd_cast(b);
2569 simd_add(a, b)
2570 }
2571}
2572#[doc = "Signed Add Long (vector, high half)."]
2573#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_high_u16)"]
2574#[inline]
2575#[target_feature(enable = "neon")]
2576#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2577#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2578#[cfg_attr(
2579 all(
2580 test,
2581 any(target_arch = "aarch64", target_arch = "arm64ec"),
2582 target_endian = "little"
2583 ),
2584 assert_instr(uaddl2)
2585)]
2586#[cfg_attr(
2587 not(target_arch = "arm"),
2588 stable(feature = "neon_intrinsics", since = "1.59.0")
2589)]
2590#[cfg_attr(
2591 target_arch = "arm",
2592 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2593)]
2594pub fn vaddl_high_u16(a: uint16x8_t, b: uint16x8_t) -> uint32x4_t {
2595 let a: uint16x4_t = vget_high_u16(a);
2596 let b: uint16x4_t = vget_high_u16(b);
2597 unsafe {
2598 let a: uint32x4_t = simd_cast(a);
2599 let b: uint32x4_t = simd_cast(b);
2600 simd_add(a, b)
2601 }
2602}
2603#[doc = "Signed Add Long (vector, high half)."]
2604#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_high_u32)"]
2605#[inline]
2606#[target_feature(enable = "neon")]
2607#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2608#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2609#[cfg_attr(
2610 all(
2611 test,
2612 any(target_arch = "aarch64", target_arch = "arm64ec"),
2613 target_endian = "little"
2614 ),
2615 assert_instr(uaddl2)
2616)]
2617#[cfg_attr(
2618 not(target_arch = "arm"),
2619 stable(feature = "neon_intrinsics", since = "1.59.0")
2620)]
2621#[cfg_attr(
2622 target_arch = "arm",
2623 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2624)]
2625pub fn vaddl_high_u32(a: uint32x4_t, b: uint32x4_t) -> uint64x2_t {
2626 let a: uint32x2_t = vget_high_u32(a);
2627 let b: uint32x2_t = vget_high_u32(b);
2628 unsafe {
2629 let a: uint64x2_t = simd_cast(a);
2630 let b: uint64x2_t = simd_cast(b);
2631 simd_add(a, b)
2632 }
2633}
2634#[doc = "Signed Add Long (vector, high half)."]
2635#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_high_u8)"]
2636#[inline]
2637#[target_feature(enable = "neon")]
2638#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2639#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2640#[cfg_attr(
2641 all(
2642 test,
2643 any(target_arch = "aarch64", target_arch = "arm64ec"),
2644 target_endian = "little"
2645 ),
2646 assert_instr(uaddl2)
2647)]
2648#[cfg_attr(
2649 not(target_arch = "arm"),
2650 stable(feature = "neon_intrinsics", since = "1.59.0")
2651)]
2652#[cfg_attr(
2653 target_arch = "arm",
2654 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2655)]
2656pub fn vaddl_high_u8(a: uint8x16_t, b: uint8x16_t) -> uint16x8_t {
2657 let a: uint8x8_t = vget_high_u8(a);
2658 let b: uint8x8_t = vget_high_u8(b);
2659 unsafe {
2660 let a: uint16x8_t = simd_cast(a);
2661 let b: uint16x8_t = simd_cast(b);
2662 simd_add(a, b)
2663 }
2664}
2665#[doc = "Add Long (vector)."]
2666#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_s16)"]
2667#[inline]
2668#[target_feature(enable = "neon")]
2669#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2670#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2671#[cfg_attr(
2672 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2673 assert_instr(saddl)
2674)]
2675#[cfg_attr(
2676 not(target_arch = "arm"),
2677 stable(feature = "neon_intrinsics", since = "1.59.0")
2678)]
2679#[cfg_attr(
2680 target_arch = "arm",
2681 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2682)]
2683pub fn vaddl_s16(a: int16x4_t, b: int16x4_t) -> int32x4_t {
2684 unsafe {
2685 let a: int32x4_t = simd_cast(a);
2686 let b: int32x4_t = simd_cast(b);
2687 simd_add(a, b)
2688 }
2689}
2690#[doc = "Add Long (vector)."]
2691#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_s32)"]
2692#[inline]
2693#[target_feature(enable = "neon")]
2694#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2695#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2696#[cfg_attr(
2697 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2698 assert_instr(saddl)
2699)]
2700#[cfg_attr(
2701 not(target_arch = "arm"),
2702 stable(feature = "neon_intrinsics", since = "1.59.0")
2703)]
2704#[cfg_attr(
2705 target_arch = "arm",
2706 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2707)]
2708pub fn vaddl_s32(a: int32x2_t, b: int32x2_t) -> int64x2_t {
2709 unsafe {
2710 let a: int64x2_t = simd_cast(a);
2711 let b: int64x2_t = simd_cast(b);
2712 simd_add(a, b)
2713 }
2714}
2715#[doc = "Add Long (vector)."]
2716#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_s8)"]
2717#[inline]
2718#[target_feature(enable = "neon")]
2719#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2720#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2721#[cfg_attr(
2722 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2723 assert_instr(saddl)
2724)]
2725#[cfg_attr(
2726 not(target_arch = "arm"),
2727 stable(feature = "neon_intrinsics", since = "1.59.0")
2728)]
2729#[cfg_attr(
2730 target_arch = "arm",
2731 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2732)]
2733pub fn vaddl_s8(a: int8x8_t, b: int8x8_t) -> int16x8_t {
2734 unsafe {
2735 let a: int16x8_t = simd_cast(a);
2736 let b: int16x8_t = simd_cast(b);
2737 simd_add(a, b)
2738 }
2739}
2740#[doc = "Add Long (vector)."]
2741#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_u16)"]
2742#[inline]
2743#[target_feature(enable = "neon")]
2744#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2745#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2746#[cfg_attr(
2747 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2748 assert_instr(uaddl)
2749)]
2750#[cfg_attr(
2751 not(target_arch = "arm"),
2752 stable(feature = "neon_intrinsics", since = "1.59.0")
2753)]
2754#[cfg_attr(
2755 target_arch = "arm",
2756 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2757)]
2758pub fn vaddl_u16(a: uint16x4_t, b: uint16x4_t) -> uint32x4_t {
2759 unsafe {
2760 let a: uint32x4_t = simd_cast(a);
2761 let b: uint32x4_t = simd_cast(b);
2762 simd_add(a, b)
2763 }
2764}
2765#[doc = "Add Long (vector)."]
2766#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_u32)"]
2767#[inline]
2768#[target_feature(enable = "neon")]
2769#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2770#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2771#[cfg_attr(
2772 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2773 assert_instr(uaddl)
2774)]
2775#[cfg_attr(
2776 not(target_arch = "arm"),
2777 stable(feature = "neon_intrinsics", since = "1.59.0")
2778)]
2779#[cfg_attr(
2780 target_arch = "arm",
2781 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2782)]
2783pub fn vaddl_u32(a: uint32x2_t, b: uint32x2_t) -> uint64x2_t {
2784 unsafe {
2785 let a: uint64x2_t = simd_cast(a);
2786 let b: uint64x2_t = simd_cast(b);
2787 simd_add(a, b)
2788 }
2789}
2790#[doc = "Add Long (vector)."]
2791#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddl_u8)"]
2792#[inline]
2793#[target_feature(enable = "neon")]
2794#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2795#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddl))]
2796#[cfg_attr(
2797 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2798 assert_instr(uaddl)
2799)]
2800#[cfg_attr(
2801 not(target_arch = "arm"),
2802 stable(feature = "neon_intrinsics", since = "1.59.0")
2803)]
2804#[cfg_attr(
2805 target_arch = "arm",
2806 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2807)]
2808pub fn vaddl_u8(a: uint8x8_t, b: uint8x8_t) -> uint16x8_t {
2809 unsafe {
2810 let a: uint16x8_t = simd_cast(a);
2811 let b: uint16x8_t = simd_cast(b);
2812 simd_add(a, b)
2813 }
2814}
2815#[doc = "Bitwise exclusive OR"]
2816#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddq_p128)"]
2817#[inline]
2818#[target_feature(enable = "neon")]
2819#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2820#[cfg_attr(all(test, target_arch = "arm"), assert_instr(nop))]
2821#[cfg_attr(
2822 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
2823 assert_instr(nop)
2824)]
2825#[cfg_attr(
2826 not(target_arch = "arm"),
2827 stable(feature = "neon_intrinsics", since = "1.59.0")
2828)]
2829#[cfg_attr(
2830 target_arch = "arm",
2831 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2832)]
2833pub fn vaddq_p128(a: p128, b: p128) -> p128 {
2834 a ^ b
2835}
2836#[doc = "Add Wide (high half)."]
2837#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_high_s16)"]
2838#[inline]
2839#[target_feature(enable = "neon")]
2840#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2841#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
2842#[cfg_attr(
2843 all(
2844 test,
2845 any(target_arch = "aarch64", target_arch = "arm64ec"),
2846 target_endian = "little"
2847 ),
2848 assert_instr(saddw2)
2849)]
2850#[cfg_attr(
2851 not(target_arch = "arm"),
2852 stable(feature = "neon_intrinsics", since = "1.59.0")
2853)]
2854#[cfg_attr(
2855 target_arch = "arm",
2856 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2857)]
2858pub fn vaddw_high_s16(a: int32x4_t, b: int16x8_t) -> int32x4_t {
2859 let b = vget_high_s16(b);
2860 unsafe {
2861 let b: int32x4_t = simd_cast(b);
2862 simd_add(a, b)
2863 }
2864}
2865#[doc = "Add Wide (high half)."]
2866#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_high_s32)"]
2867#[inline]
2868#[target_feature(enable = "neon")]
2869#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2870#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
2871#[cfg_attr(
2872 all(
2873 test,
2874 any(target_arch = "aarch64", target_arch = "arm64ec"),
2875 target_endian = "little"
2876 ),
2877 assert_instr(saddw2)
2878)]
2879#[cfg_attr(
2880 not(target_arch = "arm"),
2881 stable(feature = "neon_intrinsics", since = "1.59.0")
2882)]
2883#[cfg_attr(
2884 target_arch = "arm",
2885 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2886)]
2887pub fn vaddw_high_s32(a: int64x2_t, b: int32x4_t) -> int64x2_t {
2888 let b = vget_high_s32(b);
2889 unsafe {
2890 let b: int64x2_t = simd_cast(b);
2891 simd_add(a, b)
2892 }
2893}
2894#[doc = "Add Wide (high half)."]
2895#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_high_s8)"]
2896#[inline]
2897#[target_feature(enable = "neon")]
2898#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2899#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
2900#[cfg_attr(
2901 all(
2902 test,
2903 any(target_arch = "aarch64", target_arch = "arm64ec"),
2904 target_endian = "little"
2905 ),
2906 assert_instr(saddw2)
2907)]
2908#[cfg_attr(
2909 not(target_arch = "arm"),
2910 stable(feature = "neon_intrinsics", since = "1.59.0")
2911)]
2912#[cfg_attr(
2913 target_arch = "arm",
2914 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2915)]
2916pub fn vaddw_high_s8(a: int16x8_t, b: int8x16_t) -> int16x8_t {
2917 let b = vget_high_s8(b);
2918 unsafe {
2919 let b: int16x8_t = simd_cast(b);
2920 simd_add(a, b)
2921 }
2922}
2923#[doc = "Add Wide (high half)."]
2924#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_high_u16)"]
2925#[inline]
2926#[target_feature(enable = "neon")]
2927#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2928#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
2929#[cfg_attr(
2930 all(
2931 test,
2932 any(target_arch = "aarch64", target_arch = "arm64ec"),
2933 target_endian = "little"
2934 ),
2935 assert_instr(uaddw2)
2936)]
2937#[cfg_attr(
2938 not(target_arch = "arm"),
2939 stable(feature = "neon_intrinsics", since = "1.59.0")
2940)]
2941#[cfg_attr(
2942 target_arch = "arm",
2943 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2944)]
2945pub fn vaddw_high_u16(a: uint32x4_t, b: uint16x8_t) -> uint32x4_t {
2946 let b = vget_high_u16(b);
2947 unsafe {
2948 let b: uint32x4_t = simd_cast(b);
2949 simd_add(a, b)
2950 }
2951}
2952#[doc = "Add Wide (high half)."]
2953#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_high_u32)"]
2954#[inline]
2955#[target_feature(enable = "neon")]
2956#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2957#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
2958#[cfg_attr(
2959 all(
2960 test,
2961 any(target_arch = "aarch64", target_arch = "arm64ec"),
2962 target_endian = "little"
2963 ),
2964 assert_instr(uaddw2)
2965)]
2966#[cfg_attr(
2967 not(target_arch = "arm"),
2968 stable(feature = "neon_intrinsics", since = "1.59.0")
2969)]
2970#[cfg_attr(
2971 target_arch = "arm",
2972 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
2973)]
2974pub fn vaddw_high_u32(a: uint64x2_t, b: uint32x4_t) -> uint64x2_t {
2975 let b = vget_high_u32(b);
2976 unsafe {
2977 let b: uint64x2_t = simd_cast(b);
2978 simd_add(a, b)
2979 }
2980}
2981#[doc = "Add Wide (high half)."]
2982#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_high_u8)"]
2983#[inline]
2984#[target_feature(enable = "neon")]
2985#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
2986#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
2987#[cfg_attr(
2988 all(
2989 test,
2990 any(target_arch = "aarch64", target_arch = "arm64ec"),
2991 target_endian = "little"
2992 ),
2993 assert_instr(uaddw2)
2994)]
2995#[cfg_attr(
2996 not(target_arch = "arm"),
2997 stable(feature = "neon_intrinsics", since = "1.59.0")
2998)]
2999#[cfg_attr(
3000 target_arch = "arm",
3001 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3002)]
3003pub fn vaddw_high_u8(a: uint16x8_t, b: uint8x16_t) -> uint16x8_t {
3004 let b = vget_high_u8(b);
3005 unsafe {
3006 let b: uint16x8_t = simd_cast(b);
3007 simd_add(a, b)
3008 }
3009}
3010#[doc = "Add Wide"]
3011#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_s16)"]
3012#[inline]
3013#[target_feature(enable = "neon")]
3014#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3015#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3016#[cfg_attr(
3017 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3018 assert_instr(saddw)
3019)]
3020#[cfg_attr(
3021 not(target_arch = "arm"),
3022 stable(feature = "neon_intrinsics", since = "1.59.0")
3023)]
3024#[cfg_attr(
3025 target_arch = "arm",
3026 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3027)]
3028pub fn vaddw_s16(a: int32x4_t, b: int16x4_t) -> int32x4_t {
3029 unsafe {
3030 let b: int32x4_t = simd_cast(b);
3031 simd_add(a, b)
3032 }
3033}
3034#[doc = "Add Wide"]
3035#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_s32)"]
3036#[inline]
3037#[target_feature(enable = "neon")]
3038#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3039#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3040#[cfg_attr(
3041 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3042 assert_instr(saddw)
3043)]
3044#[cfg_attr(
3045 not(target_arch = "arm"),
3046 stable(feature = "neon_intrinsics", since = "1.59.0")
3047)]
3048#[cfg_attr(
3049 target_arch = "arm",
3050 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3051)]
3052pub fn vaddw_s32(a: int64x2_t, b: int32x2_t) -> int64x2_t {
3053 unsafe {
3054 let b: int64x2_t = simd_cast(b);
3055 simd_add(a, b)
3056 }
3057}
3058#[doc = "Add Wide"]
3059#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_s8)"]
3060#[inline]
3061#[target_feature(enable = "neon")]
3062#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3063#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3064#[cfg_attr(
3065 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3066 assert_instr(saddw)
3067)]
3068#[cfg_attr(
3069 not(target_arch = "arm"),
3070 stable(feature = "neon_intrinsics", since = "1.59.0")
3071)]
3072#[cfg_attr(
3073 target_arch = "arm",
3074 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3075)]
3076pub fn vaddw_s8(a: int16x8_t, b: int8x8_t) -> int16x8_t {
3077 unsafe {
3078 let b: int16x8_t = simd_cast(b);
3079 simd_add(a, b)
3080 }
3081}
3082#[doc = "Add Wide"]
3083#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_u16)"]
3084#[inline]
3085#[target_feature(enable = "neon")]
3086#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3087#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3088#[cfg_attr(
3089 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3090 assert_instr(uaddw)
3091)]
3092#[cfg_attr(
3093 not(target_arch = "arm"),
3094 stable(feature = "neon_intrinsics", since = "1.59.0")
3095)]
3096#[cfg_attr(
3097 target_arch = "arm",
3098 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3099)]
3100pub fn vaddw_u16(a: uint32x4_t, b: uint16x4_t) -> uint32x4_t {
3101 unsafe {
3102 let b: uint32x4_t = simd_cast(b);
3103 simd_add(a, b)
3104 }
3105}
3106#[doc = "Add Wide"]
3107#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_u32)"]
3108#[inline]
3109#[target_feature(enable = "neon")]
3110#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3111#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3112#[cfg_attr(
3113 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3114 assert_instr(uaddw)
3115)]
3116#[cfg_attr(
3117 not(target_arch = "arm"),
3118 stable(feature = "neon_intrinsics", since = "1.59.0")
3119)]
3120#[cfg_attr(
3121 target_arch = "arm",
3122 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3123)]
3124pub fn vaddw_u32(a: uint64x2_t, b: uint32x2_t) -> uint64x2_t {
3125 unsafe {
3126 let b: uint64x2_t = simd_cast(b);
3127 simd_add(a, b)
3128 }
3129}
3130#[doc = "Add Wide"]
3131#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaddw_u8)"]
3132#[inline]
3133#[target_feature(enable = "neon")]
3134#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3135#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vaddw))]
3136#[cfg_attr(
3137 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3138 assert_instr(uaddw)
3139)]
3140#[cfg_attr(
3141 not(target_arch = "arm"),
3142 stable(feature = "neon_intrinsics", since = "1.59.0")
3143)]
3144#[cfg_attr(
3145 target_arch = "arm",
3146 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3147)]
3148pub fn vaddw_u8(a: uint16x8_t, b: uint8x8_t) -> uint16x8_t {
3149 unsafe {
3150 let b: uint16x8_t = simd_cast(b);
3151 simd_add(a, b)
3152 }
3153}
3154#[doc = "AES single round encryption."]
3155#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesdq_u8)"]
3156#[inline]
3157#[cfg(target_endian = "little")]
3158#[target_feature(enable = "aes")]
3159#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
3160#[cfg_attr(test, assert_instr(aesd))]
3161#[cfg_attr(
3162 target_arch = "arm",
3163 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3164)]
3165#[cfg_attr(
3166 not(target_arch = "arm"),
3167 stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
3168)]
3169pub fn vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
3170 unsafe extern "unadjusted" {
3171 #[cfg_attr(
3172 any(target_arch = "aarch64", target_arch = "arm64ec"),
3173 link_name = "llvm.aarch64.crypto.aesd"
3174 )]
3175 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesd")]
3176 fn _vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t;
3177 }
3178 unsafe { _vaesdq_u8(data, key) }
3179}
3180#[doc = "AES single round encryption."]
3181#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesdq_u8)"]
3182#[inline]
3183#[cfg(target_endian = "big")]
3184#[target_feature(enable = "aes")]
3185#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
3186#[cfg_attr(test, assert_instr(aesd))]
3187#[cfg_attr(
3188 target_arch = "arm",
3189 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3190)]
3191#[cfg_attr(
3192 not(target_arch = "arm"),
3193 stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
3194)]
3195pub fn vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
3196 unsafe extern "unadjusted" {
3197 #[cfg_attr(
3198 any(target_arch = "aarch64", target_arch = "arm64ec"),
3199 link_name = "llvm.aarch64.crypto.aesd"
3200 )]
3201 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesd")]
3202 fn _vaesdq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t;
3203 }
3204 unsafe {
3205 let data: uint8x16_t = simd_shuffle!(
3206 data,
3207 data,
3208 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3209 );
3210 let key: uint8x16_t = simd_shuffle!(
3211 key,
3212 key,
3213 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3214 );
3215 let ret_val: uint8x16_t = _vaesdq_u8(data, key);
3216 simd_shuffle!(
3217 ret_val,
3218 ret_val,
3219 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3220 )
3221 }
3222}
3223#[doc = "AES single round encryption."]
3224#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaeseq_u8)"]
3225#[inline]
3226#[cfg(target_endian = "little")]
3227#[target_feature(enable = "aes")]
3228#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
3229#[cfg_attr(test, assert_instr(aese))]
3230#[cfg_attr(
3231 target_arch = "arm",
3232 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3233)]
3234#[cfg_attr(
3235 not(target_arch = "arm"),
3236 stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
3237)]
3238pub fn vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
3239 unsafe extern "unadjusted" {
3240 #[cfg_attr(
3241 any(target_arch = "aarch64", target_arch = "arm64ec"),
3242 link_name = "llvm.aarch64.crypto.aese"
3243 )]
3244 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aese")]
3245 fn _vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t;
3246 }
3247 unsafe { _vaeseq_u8(data, key) }
3248}
3249#[doc = "AES single round encryption."]
3250#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaeseq_u8)"]
3251#[inline]
3252#[cfg(target_endian = "big")]
3253#[target_feature(enable = "aes")]
3254#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
3255#[cfg_attr(test, assert_instr(aese))]
3256#[cfg_attr(
3257 target_arch = "arm",
3258 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3259)]
3260#[cfg_attr(
3261 not(target_arch = "arm"),
3262 stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
3263)]
3264pub fn vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t {
3265 unsafe extern "unadjusted" {
3266 #[cfg_attr(
3267 any(target_arch = "aarch64", target_arch = "arm64ec"),
3268 link_name = "llvm.aarch64.crypto.aese"
3269 )]
3270 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aese")]
3271 fn _vaeseq_u8(data: uint8x16_t, key: uint8x16_t) -> uint8x16_t;
3272 }
3273 unsafe {
3274 let data: uint8x16_t = simd_shuffle!(
3275 data,
3276 data,
3277 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3278 );
3279 let key: uint8x16_t = simd_shuffle!(
3280 key,
3281 key,
3282 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3283 );
3284 let ret_val: uint8x16_t = _vaeseq_u8(data, key);
3285 simd_shuffle!(
3286 ret_val,
3287 ret_val,
3288 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3289 )
3290 }
3291}
3292#[doc = "AES inverse mix columns."]
3293#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesimcq_u8)"]
3294#[inline]
3295#[cfg(target_endian = "little")]
3296#[target_feature(enable = "aes")]
3297#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
3298#[cfg_attr(test, assert_instr(aesimc))]
3299#[cfg_attr(
3300 target_arch = "arm",
3301 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3302)]
3303#[cfg_attr(
3304 not(target_arch = "arm"),
3305 stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
3306)]
3307pub fn vaesimcq_u8(data: uint8x16_t) -> uint8x16_t {
3308 unsafe extern "unadjusted" {
3309 #[cfg_attr(
3310 any(target_arch = "aarch64", target_arch = "arm64ec"),
3311 link_name = "llvm.aarch64.crypto.aesimc"
3312 )]
3313 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesimc")]
3314 fn _vaesimcq_u8(data: uint8x16_t) -> uint8x16_t;
3315 }
3316 unsafe { _vaesimcq_u8(data) }
3317}
3318#[doc = "AES inverse mix columns."]
3319#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesimcq_u8)"]
3320#[inline]
3321#[cfg(target_endian = "big")]
3322#[target_feature(enable = "aes")]
3323#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
3324#[cfg_attr(test, assert_instr(aesimc))]
3325#[cfg_attr(
3326 target_arch = "arm",
3327 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3328)]
3329#[cfg_attr(
3330 not(target_arch = "arm"),
3331 stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
3332)]
3333pub fn vaesimcq_u8(data: uint8x16_t) -> uint8x16_t {
3334 unsafe extern "unadjusted" {
3335 #[cfg_attr(
3336 any(target_arch = "aarch64", target_arch = "arm64ec"),
3337 link_name = "llvm.aarch64.crypto.aesimc"
3338 )]
3339 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesimc")]
3340 fn _vaesimcq_u8(data: uint8x16_t) -> uint8x16_t;
3341 }
3342 unsafe {
3343 let data: uint8x16_t = simd_shuffle!(
3344 data,
3345 data,
3346 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3347 );
3348 let ret_val: uint8x16_t = _vaesimcq_u8(data);
3349 simd_shuffle!(
3350 ret_val,
3351 ret_val,
3352 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3353 )
3354 }
3355}
3356#[doc = "AES mix columns."]
3357#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesmcq_u8)"]
3358#[inline]
3359#[cfg(target_endian = "little")]
3360#[target_feature(enable = "aes")]
3361#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
3362#[cfg_attr(test, assert_instr(aesmc))]
3363#[cfg_attr(
3364 target_arch = "arm",
3365 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3366)]
3367#[cfg_attr(
3368 not(target_arch = "arm"),
3369 stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
3370)]
3371pub fn vaesmcq_u8(data: uint8x16_t) -> uint8x16_t {
3372 unsafe extern "unadjusted" {
3373 #[cfg_attr(
3374 any(target_arch = "aarch64", target_arch = "arm64ec"),
3375 link_name = "llvm.aarch64.crypto.aesmc"
3376 )]
3377 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesmc")]
3378 fn _vaesmcq_u8(data: uint8x16_t) -> uint8x16_t;
3379 }
3380 unsafe { _vaesmcq_u8(data) }
3381}
3382#[doc = "AES mix columns."]
3383#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vaesmcq_u8)"]
3384#[inline]
3385#[cfg(target_endian = "big")]
3386#[target_feature(enable = "aes")]
3387#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
3388#[cfg_attr(test, assert_instr(aesmc))]
3389#[cfg_attr(
3390 target_arch = "arm",
3391 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3392)]
3393#[cfg_attr(
3394 not(target_arch = "arm"),
3395 stable(feature = "aarch64_neon_crypto_intrinsics", since = "1.72.0")
3396)]
3397pub fn vaesmcq_u8(data: uint8x16_t) -> uint8x16_t {
3398 unsafe extern "unadjusted" {
3399 #[cfg_attr(
3400 any(target_arch = "aarch64", target_arch = "arm64ec"),
3401 link_name = "llvm.aarch64.crypto.aesmc"
3402 )]
3403 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.aesmc")]
3404 fn _vaesmcq_u8(data: uint8x16_t) -> uint8x16_t;
3405 }
3406 unsafe {
3407 let data: uint8x16_t = simd_shuffle!(
3408 data,
3409 data,
3410 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3411 );
3412 let ret_val: uint8x16_t = _vaesmcq_u8(data);
3413 simd_shuffle!(
3414 ret_val,
3415 ret_val,
3416 [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0]
3417 )
3418 }
3419}
3420#[doc = "Vector bitwise and"]
3421#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vand_s8)"]
3422#[inline]
3423#[target_feature(enable = "neon")]
3424#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3425#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3426#[cfg_attr(
3427 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3428 assert_instr(and)
3429)]
3430#[cfg_attr(
3431 not(target_arch = "arm"),
3432 stable(feature = "neon_intrinsics", since = "1.59.0")
3433)]
3434#[cfg_attr(
3435 target_arch = "arm",
3436 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3437)]
3438pub fn vand_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
3439 unsafe { simd_and(a, b) }
3440}
3441#[doc = "Vector bitwise and"]
3442#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vandq_s8)"]
3443#[inline]
3444#[target_feature(enable = "neon")]
3445#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3446#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3447#[cfg_attr(
3448 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3449 assert_instr(and)
3450)]
3451#[cfg_attr(
3452 not(target_arch = "arm"),
3453 stable(feature = "neon_intrinsics", since = "1.59.0")
3454)]
3455#[cfg_attr(
3456 target_arch = "arm",
3457 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3458)]
3459pub fn vandq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
3460 unsafe { simd_and(a, b) }
3461}
3462#[doc = "Vector bitwise and"]
3463#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vand_s16)"]
3464#[inline]
3465#[target_feature(enable = "neon")]
3466#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3467#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3468#[cfg_attr(
3469 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3470 assert_instr(and)
3471)]
3472#[cfg_attr(
3473 not(target_arch = "arm"),
3474 stable(feature = "neon_intrinsics", since = "1.59.0")
3475)]
3476#[cfg_attr(
3477 target_arch = "arm",
3478 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3479)]
3480pub fn vand_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
3481 unsafe { simd_and(a, b) }
3482}
3483#[doc = "Vector bitwise and"]
3484#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vandq_s16)"]
3485#[inline]
3486#[target_feature(enable = "neon")]
3487#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3488#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3489#[cfg_attr(
3490 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3491 assert_instr(and)
3492)]
3493#[cfg_attr(
3494 not(target_arch = "arm"),
3495 stable(feature = "neon_intrinsics", since = "1.59.0")
3496)]
3497#[cfg_attr(
3498 target_arch = "arm",
3499 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3500)]
3501pub fn vandq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
3502 unsafe { simd_and(a, b) }
3503}
3504#[doc = "Vector bitwise and"]
3505#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vand_s32)"]
3506#[inline]
3507#[target_feature(enable = "neon")]
3508#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3509#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3510#[cfg_attr(
3511 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3512 assert_instr(and)
3513)]
3514#[cfg_attr(
3515 not(target_arch = "arm"),
3516 stable(feature = "neon_intrinsics", since = "1.59.0")
3517)]
3518#[cfg_attr(
3519 target_arch = "arm",
3520 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3521)]
3522pub fn vand_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
3523 unsafe { simd_and(a, b) }
3524}
3525#[doc = "Vector bitwise and"]
3526#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vandq_s32)"]
3527#[inline]
3528#[target_feature(enable = "neon")]
3529#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3530#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3531#[cfg_attr(
3532 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3533 assert_instr(and)
3534)]
3535#[cfg_attr(
3536 not(target_arch = "arm"),
3537 stable(feature = "neon_intrinsics", since = "1.59.0")
3538)]
3539#[cfg_attr(
3540 target_arch = "arm",
3541 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3542)]
3543pub fn vandq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
3544 unsafe { simd_and(a, b) }
3545}
3546#[doc = "Vector bitwise and"]
3547#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vand_s64)"]
3548#[inline]
3549#[target_feature(enable = "neon")]
3550#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3551#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3552#[cfg_attr(
3553 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3554 assert_instr(and)
3555)]
3556#[cfg_attr(
3557 not(target_arch = "arm"),
3558 stable(feature = "neon_intrinsics", since = "1.59.0")
3559)]
3560#[cfg_attr(
3561 target_arch = "arm",
3562 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3563)]
3564pub fn vand_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
3565 unsafe { simd_and(a, b) }
3566}
3567#[doc = "Vector bitwise and"]
3568#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vandq_s64)"]
3569#[inline]
3570#[target_feature(enable = "neon")]
3571#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3572#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3573#[cfg_attr(
3574 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3575 assert_instr(and)
3576)]
3577#[cfg_attr(
3578 not(target_arch = "arm"),
3579 stable(feature = "neon_intrinsics", since = "1.59.0")
3580)]
3581#[cfg_attr(
3582 target_arch = "arm",
3583 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3584)]
3585pub fn vandq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
3586 unsafe { simd_and(a, b) }
3587}
3588#[doc = "Vector bitwise and"]
3589#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vand_u8)"]
3590#[inline]
3591#[target_feature(enable = "neon")]
3592#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3593#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3594#[cfg_attr(
3595 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3596 assert_instr(and)
3597)]
3598#[cfg_attr(
3599 not(target_arch = "arm"),
3600 stable(feature = "neon_intrinsics", since = "1.59.0")
3601)]
3602#[cfg_attr(
3603 target_arch = "arm",
3604 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3605)]
3606pub fn vand_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
3607 unsafe { simd_and(a, b) }
3608}
3609#[doc = "Vector bitwise and"]
3610#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vandq_u8)"]
3611#[inline]
3612#[target_feature(enable = "neon")]
3613#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3614#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3615#[cfg_attr(
3616 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3617 assert_instr(and)
3618)]
3619#[cfg_attr(
3620 not(target_arch = "arm"),
3621 stable(feature = "neon_intrinsics", since = "1.59.0")
3622)]
3623#[cfg_attr(
3624 target_arch = "arm",
3625 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3626)]
3627pub fn vandq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
3628 unsafe { simd_and(a, b) }
3629}
3630#[doc = "Vector bitwise and"]
3631#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vand_u16)"]
3632#[inline]
3633#[target_feature(enable = "neon")]
3634#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3635#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3636#[cfg_attr(
3637 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3638 assert_instr(and)
3639)]
3640#[cfg_attr(
3641 not(target_arch = "arm"),
3642 stable(feature = "neon_intrinsics", since = "1.59.0")
3643)]
3644#[cfg_attr(
3645 target_arch = "arm",
3646 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3647)]
3648pub fn vand_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
3649 unsafe { simd_and(a, b) }
3650}
3651#[doc = "Vector bitwise and"]
3652#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vandq_u16)"]
3653#[inline]
3654#[target_feature(enable = "neon")]
3655#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3656#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3657#[cfg_attr(
3658 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3659 assert_instr(and)
3660)]
3661#[cfg_attr(
3662 not(target_arch = "arm"),
3663 stable(feature = "neon_intrinsics", since = "1.59.0")
3664)]
3665#[cfg_attr(
3666 target_arch = "arm",
3667 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3668)]
3669pub fn vandq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
3670 unsafe { simd_and(a, b) }
3671}
3672#[doc = "Vector bitwise and"]
3673#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vand_u32)"]
3674#[inline]
3675#[target_feature(enable = "neon")]
3676#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3677#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3678#[cfg_attr(
3679 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3680 assert_instr(and)
3681)]
3682#[cfg_attr(
3683 not(target_arch = "arm"),
3684 stable(feature = "neon_intrinsics", since = "1.59.0")
3685)]
3686#[cfg_attr(
3687 target_arch = "arm",
3688 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3689)]
3690pub fn vand_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
3691 unsafe { simd_and(a, b) }
3692}
3693#[doc = "Vector bitwise and"]
3694#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vandq_u32)"]
3695#[inline]
3696#[target_feature(enable = "neon")]
3697#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3698#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3699#[cfg_attr(
3700 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3701 assert_instr(and)
3702)]
3703#[cfg_attr(
3704 not(target_arch = "arm"),
3705 stable(feature = "neon_intrinsics", since = "1.59.0")
3706)]
3707#[cfg_attr(
3708 target_arch = "arm",
3709 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3710)]
3711pub fn vandq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
3712 unsafe { simd_and(a, b) }
3713}
3714#[doc = "Vector bitwise and"]
3715#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vand_u64)"]
3716#[inline]
3717#[target_feature(enable = "neon")]
3718#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3719#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3720#[cfg_attr(
3721 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3722 assert_instr(and)
3723)]
3724#[cfg_attr(
3725 not(target_arch = "arm"),
3726 stable(feature = "neon_intrinsics", since = "1.59.0")
3727)]
3728#[cfg_attr(
3729 target_arch = "arm",
3730 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3731)]
3732pub fn vand_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
3733 unsafe { simd_and(a, b) }
3734}
3735#[doc = "Vector bitwise and"]
3736#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vandq_u64)"]
3737#[inline]
3738#[target_feature(enable = "neon")]
3739#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3740#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))]
3741#[cfg_attr(
3742 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3743 assert_instr(and)
3744)]
3745#[cfg_attr(
3746 not(target_arch = "arm"),
3747 stable(feature = "neon_intrinsics", since = "1.59.0")
3748)]
3749#[cfg_attr(
3750 target_arch = "arm",
3751 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3752)]
3753pub fn vandq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
3754 unsafe { simd_and(a, b) }
3755}
3756#[doc = "Vector bitwise bit clear."]
3757#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbic_s16)"]
3758#[inline]
3759#[target_feature(enable = "neon")]
3760#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3761#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3762#[cfg_attr(
3763 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3764 assert_instr(bic)
3765)]
3766#[cfg_attr(
3767 not(target_arch = "arm"),
3768 stable(feature = "neon_intrinsics", since = "1.59.0")
3769)]
3770#[cfg_attr(
3771 target_arch = "arm",
3772 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3773)]
3774pub fn vbic_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t {
3775 let c = int16x4_t::splat(-1);
3776 unsafe { simd_and(simd_xor(b, c), a) }
3777}
3778#[doc = "Vector bitwise bit clear."]
3779#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbic_s32)"]
3780#[inline]
3781#[target_feature(enable = "neon")]
3782#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3783#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3784#[cfg_attr(
3785 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3786 assert_instr(bic)
3787)]
3788#[cfg_attr(
3789 not(target_arch = "arm"),
3790 stable(feature = "neon_intrinsics", since = "1.59.0")
3791)]
3792#[cfg_attr(
3793 target_arch = "arm",
3794 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3795)]
3796pub fn vbic_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t {
3797 let c = int32x2_t::splat(-1);
3798 unsafe { simd_and(simd_xor(b, c), a) }
3799}
3800#[doc = "Vector bitwise bit clear."]
3801#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbic_s64)"]
3802#[inline]
3803#[target_feature(enable = "neon")]
3804#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3805#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3806#[cfg_attr(
3807 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3808 assert_instr(bic)
3809)]
3810#[cfg_attr(
3811 not(target_arch = "arm"),
3812 stable(feature = "neon_intrinsics", since = "1.59.0")
3813)]
3814#[cfg_attr(
3815 target_arch = "arm",
3816 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3817)]
3818pub fn vbic_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t {
3819 let c = int64x1_t::splat(-1);
3820 unsafe { simd_and(simd_xor(b, c), a) }
3821}
3822#[doc = "Vector bitwise bit clear."]
3823#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbic_s8)"]
3824#[inline]
3825#[target_feature(enable = "neon")]
3826#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3827#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3828#[cfg_attr(
3829 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3830 assert_instr(bic)
3831)]
3832#[cfg_attr(
3833 not(target_arch = "arm"),
3834 stable(feature = "neon_intrinsics", since = "1.59.0")
3835)]
3836#[cfg_attr(
3837 target_arch = "arm",
3838 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3839)]
3840pub fn vbic_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t {
3841 let c = int8x8_t::splat(-1);
3842 unsafe { simd_and(simd_xor(b, c), a) }
3843}
3844#[doc = "Vector bitwise bit clear."]
3845#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbicq_s16)"]
3846#[inline]
3847#[target_feature(enable = "neon")]
3848#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3849#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3850#[cfg_attr(
3851 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3852 assert_instr(bic)
3853)]
3854#[cfg_attr(
3855 not(target_arch = "arm"),
3856 stable(feature = "neon_intrinsics", since = "1.59.0")
3857)]
3858#[cfg_attr(
3859 target_arch = "arm",
3860 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3861)]
3862pub fn vbicq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t {
3863 let c = int16x8_t::splat(-1);
3864 unsafe { simd_and(simd_xor(b, c), a) }
3865}
3866#[doc = "Vector bitwise bit clear."]
3867#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbicq_s32)"]
3868#[inline]
3869#[target_feature(enable = "neon")]
3870#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3871#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3872#[cfg_attr(
3873 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3874 assert_instr(bic)
3875)]
3876#[cfg_attr(
3877 not(target_arch = "arm"),
3878 stable(feature = "neon_intrinsics", since = "1.59.0")
3879)]
3880#[cfg_attr(
3881 target_arch = "arm",
3882 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3883)]
3884pub fn vbicq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t {
3885 let c = int32x4_t::splat(-1);
3886 unsafe { simd_and(simd_xor(b, c), a) }
3887}
3888#[doc = "Vector bitwise bit clear."]
3889#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbicq_s64)"]
3890#[inline]
3891#[target_feature(enable = "neon")]
3892#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3893#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3894#[cfg_attr(
3895 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3896 assert_instr(bic)
3897)]
3898#[cfg_attr(
3899 not(target_arch = "arm"),
3900 stable(feature = "neon_intrinsics", since = "1.59.0")
3901)]
3902#[cfg_attr(
3903 target_arch = "arm",
3904 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3905)]
3906pub fn vbicq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t {
3907 let c = int64x2_t::splat(-1);
3908 unsafe { simd_and(simd_xor(b, c), a) }
3909}
3910#[doc = "Vector bitwise bit clear."]
3911#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbicq_s8)"]
3912#[inline]
3913#[target_feature(enable = "neon")]
3914#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3915#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3916#[cfg_attr(
3917 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3918 assert_instr(bic)
3919)]
3920#[cfg_attr(
3921 not(target_arch = "arm"),
3922 stable(feature = "neon_intrinsics", since = "1.59.0")
3923)]
3924#[cfg_attr(
3925 target_arch = "arm",
3926 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3927)]
3928pub fn vbicq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t {
3929 let c = int8x16_t::splat(-1);
3930 unsafe { simd_and(simd_xor(b, c), a) }
3931}
3932#[doc = "Vector bitwise bit clear."]
3933#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbic_u16)"]
3934#[inline]
3935#[target_feature(enable = "neon")]
3936#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3937#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3938#[cfg_attr(
3939 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3940 assert_instr(bic)
3941)]
3942#[cfg_attr(
3943 not(target_arch = "arm"),
3944 stable(feature = "neon_intrinsics", since = "1.59.0")
3945)]
3946#[cfg_attr(
3947 target_arch = "arm",
3948 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3949)]
3950pub fn vbic_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
3951 let c = int16x4_t::splat(-1);
3952 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
3953}
3954#[doc = "Vector bitwise bit clear."]
3955#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbic_u32)"]
3956#[inline]
3957#[target_feature(enable = "neon")]
3958#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3959#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3960#[cfg_attr(
3961 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3962 assert_instr(bic)
3963)]
3964#[cfg_attr(
3965 not(target_arch = "arm"),
3966 stable(feature = "neon_intrinsics", since = "1.59.0")
3967)]
3968#[cfg_attr(
3969 target_arch = "arm",
3970 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3971)]
3972pub fn vbic_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
3973 let c = int32x2_t::splat(-1);
3974 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
3975}
3976#[doc = "Vector bitwise bit clear."]
3977#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbic_u64)"]
3978#[inline]
3979#[target_feature(enable = "neon")]
3980#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
3981#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
3982#[cfg_attr(
3983 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
3984 assert_instr(bic)
3985)]
3986#[cfg_attr(
3987 not(target_arch = "arm"),
3988 stable(feature = "neon_intrinsics", since = "1.59.0")
3989)]
3990#[cfg_attr(
3991 target_arch = "arm",
3992 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
3993)]
3994pub fn vbic_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t {
3995 let c = int64x1_t::splat(-1);
3996 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
3997}
3998#[doc = "Vector bitwise bit clear."]
3999#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbic_u8)"]
4000#[inline]
4001#[target_feature(enable = "neon")]
4002#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4003#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4004#[cfg_attr(
4005 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4006 assert_instr(bic)
4007)]
4008#[cfg_attr(
4009 not(target_arch = "arm"),
4010 stable(feature = "neon_intrinsics", since = "1.59.0")
4011)]
4012#[cfg_attr(
4013 target_arch = "arm",
4014 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4015)]
4016pub fn vbic_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
4017 let c = int8x8_t::splat(-1);
4018 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4019}
4020#[doc = "Vector bitwise bit clear."]
4021#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbicq_u16)"]
4022#[inline]
4023#[target_feature(enable = "neon")]
4024#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4025#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4026#[cfg_attr(
4027 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4028 assert_instr(bic)
4029)]
4030#[cfg_attr(
4031 not(target_arch = "arm"),
4032 stable(feature = "neon_intrinsics", since = "1.59.0")
4033)]
4034#[cfg_attr(
4035 target_arch = "arm",
4036 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4037)]
4038pub fn vbicq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
4039 let c = int16x8_t::splat(-1);
4040 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4041}
4042#[doc = "Vector bitwise bit clear."]
4043#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbicq_u32)"]
4044#[inline]
4045#[target_feature(enable = "neon")]
4046#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4047#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4048#[cfg_attr(
4049 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4050 assert_instr(bic)
4051)]
4052#[cfg_attr(
4053 not(target_arch = "arm"),
4054 stable(feature = "neon_intrinsics", since = "1.59.0")
4055)]
4056#[cfg_attr(
4057 target_arch = "arm",
4058 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4059)]
4060pub fn vbicq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
4061 let c = int32x4_t::splat(-1);
4062 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4063}
4064#[doc = "Vector bitwise bit clear."]
4065#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbicq_u64)"]
4066#[inline]
4067#[target_feature(enable = "neon")]
4068#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4069#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4070#[cfg_attr(
4071 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4072 assert_instr(bic)
4073)]
4074#[cfg_attr(
4075 not(target_arch = "arm"),
4076 stable(feature = "neon_intrinsics", since = "1.59.0")
4077)]
4078#[cfg_attr(
4079 target_arch = "arm",
4080 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4081)]
4082pub fn vbicq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t {
4083 let c = int64x2_t::splat(-1);
4084 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4085}
4086#[doc = "Vector bitwise bit clear."]
4087#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbicq_u8)"]
4088#[inline]
4089#[target_feature(enable = "neon")]
4090#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4091#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbic))]
4092#[cfg_attr(
4093 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4094 assert_instr(bic)
4095)]
4096#[cfg_attr(
4097 not(target_arch = "arm"),
4098 stable(feature = "neon_intrinsics", since = "1.59.0")
4099)]
4100#[cfg_attr(
4101 target_arch = "arm",
4102 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4103)]
4104pub fn vbicq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
4105 let c = int8x16_t::splat(-1);
4106 unsafe { simd_and(simd_xor(b, transmute(c)), a) }
4107}
4108#[doc = "Bitwise Select."]
4109#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_f16)"]
4110#[inline]
4111#[target_feature(enable = "neon,fp16")]
4112#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4113#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4114#[cfg_attr(
4115 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4116 assert_instr(bsl)
4117)]
4118#[cfg_attr(
4119 not(target_arch = "arm"),
4120 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
4121)]
4122#[cfg_attr(
4123 target_arch = "arm",
4124 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4125)]
4126#[cfg(not(target_arch = "arm64ec"))]
4127pub fn vbsl_f16(a: uint16x4_t, b: float16x4_t, c: float16x4_t) -> float16x4_t {
4128 let not = int16x4_t::splat(-1);
4129 unsafe {
4130 transmute(simd_or(
4131 simd_and(a, transmute(b)),
4132 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4133 ))
4134 }
4135}
4136#[doc = "Bitwise Select."]
4137#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_f16)"]
4138#[inline]
4139#[target_feature(enable = "neon,fp16")]
4140#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4141#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4142#[cfg_attr(
4143 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4144 assert_instr(bsl)
4145)]
4146#[cfg_attr(
4147 not(target_arch = "arm"),
4148 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
4149)]
4150#[cfg_attr(
4151 target_arch = "arm",
4152 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4153)]
4154#[cfg(not(target_arch = "arm64ec"))]
4155pub fn vbslq_f16(a: uint16x8_t, b: float16x8_t, c: float16x8_t) -> float16x8_t {
4156 let not = int16x8_t::splat(-1);
4157 unsafe {
4158 transmute(simd_or(
4159 simd_and(a, transmute(b)),
4160 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4161 ))
4162 }
4163}
4164#[doc = "Bitwise Select."]
4165#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_f32)"]
4166#[inline]
4167#[target_feature(enable = "neon")]
4168#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4169#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4170#[cfg_attr(
4171 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4172 assert_instr(bsl)
4173)]
4174#[cfg_attr(
4175 not(target_arch = "arm"),
4176 stable(feature = "neon_intrinsics", since = "1.59.0")
4177)]
4178#[cfg_attr(
4179 target_arch = "arm",
4180 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4181)]
4182pub fn vbsl_f32(a: uint32x2_t, b: float32x2_t, c: float32x2_t) -> float32x2_t {
4183 let not = int32x2_t::splat(-1);
4184 unsafe {
4185 transmute(simd_or(
4186 simd_and(a, transmute(b)),
4187 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4188 ))
4189 }
4190}
4191#[doc = "Bitwise Select."]
4192#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_p16)"]
4193#[inline]
4194#[target_feature(enable = "neon")]
4195#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4196#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4197#[cfg_attr(
4198 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4199 assert_instr(bsl)
4200)]
4201#[cfg_attr(
4202 not(target_arch = "arm"),
4203 stable(feature = "neon_intrinsics", since = "1.59.0")
4204)]
4205#[cfg_attr(
4206 target_arch = "arm",
4207 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4208)]
4209pub fn vbsl_p16(a: uint16x4_t, b: poly16x4_t, c: poly16x4_t) -> poly16x4_t {
4210 let not = int16x4_t::splat(-1);
4211 unsafe {
4212 transmute(simd_or(
4213 simd_and(a, transmute(b)),
4214 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4215 ))
4216 }
4217}
4218#[doc = "Bitwise Select."]
4219#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_p8)"]
4220#[inline]
4221#[target_feature(enable = "neon")]
4222#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4223#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4224#[cfg_attr(
4225 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4226 assert_instr(bsl)
4227)]
4228#[cfg_attr(
4229 not(target_arch = "arm"),
4230 stable(feature = "neon_intrinsics", since = "1.59.0")
4231)]
4232#[cfg_attr(
4233 target_arch = "arm",
4234 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4235)]
4236pub fn vbsl_p8(a: uint8x8_t, b: poly8x8_t, c: poly8x8_t) -> poly8x8_t {
4237 let not = int8x8_t::splat(-1);
4238 unsafe {
4239 transmute(simd_or(
4240 simd_and(a, transmute(b)),
4241 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4242 ))
4243 }
4244}
4245#[doc = "Bitwise Select."]
4246#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_s16)"]
4247#[inline]
4248#[target_feature(enable = "neon")]
4249#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4250#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4251#[cfg_attr(
4252 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4253 assert_instr(bsl)
4254)]
4255#[cfg_attr(
4256 not(target_arch = "arm"),
4257 stable(feature = "neon_intrinsics", since = "1.59.0")
4258)]
4259#[cfg_attr(
4260 target_arch = "arm",
4261 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4262)]
4263pub fn vbsl_s16(a: uint16x4_t, b: int16x4_t, c: int16x4_t) -> int16x4_t {
4264 let not = int16x4_t::splat(-1);
4265 unsafe {
4266 transmute(simd_or(
4267 simd_and(a, transmute(b)),
4268 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4269 ))
4270 }
4271}
4272#[doc = "Bitwise Select."]
4273#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_s32)"]
4274#[inline]
4275#[target_feature(enable = "neon")]
4276#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4277#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4278#[cfg_attr(
4279 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4280 assert_instr(bsl)
4281)]
4282#[cfg_attr(
4283 not(target_arch = "arm"),
4284 stable(feature = "neon_intrinsics", since = "1.59.0")
4285)]
4286#[cfg_attr(
4287 target_arch = "arm",
4288 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4289)]
4290pub fn vbsl_s32(a: uint32x2_t, b: int32x2_t, c: int32x2_t) -> int32x2_t {
4291 let not = int32x2_t::splat(-1);
4292 unsafe {
4293 transmute(simd_or(
4294 simd_and(a, transmute(b)),
4295 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4296 ))
4297 }
4298}
4299#[doc = "Bitwise Select."]
4300#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_s64)"]
4301#[inline]
4302#[target_feature(enable = "neon")]
4303#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4304#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4305#[cfg_attr(
4306 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4307 assert_instr(bsl)
4308)]
4309#[cfg_attr(
4310 not(target_arch = "arm"),
4311 stable(feature = "neon_intrinsics", since = "1.59.0")
4312)]
4313#[cfg_attr(
4314 target_arch = "arm",
4315 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4316)]
4317pub fn vbsl_s64(a: uint64x1_t, b: int64x1_t, c: int64x1_t) -> int64x1_t {
4318 let not = int64x1_t::splat(-1);
4319 unsafe {
4320 transmute(simd_or(
4321 simd_and(a, transmute(b)),
4322 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4323 ))
4324 }
4325}
4326#[doc = "Bitwise Select."]
4327#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_s8)"]
4328#[inline]
4329#[target_feature(enable = "neon")]
4330#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4331#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4332#[cfg_attr(
4333 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4334 assert_instr(bsl)
4335)]
4336#[cfg_attr(
4337 not(target_arch = "arm"),
4338 stable(feature = "neon_intrinsics", since = "1.59.0")
4339)]
4340#[cfg_attr(
4341 target_arch = "arm",
4342 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4343)]
4344pub fn vbsl_s8(a: uint8x8_t, b: int8x8_t, c: int8x8_t) -> int8x8_t {
4345 let not = int8x8_t::splat(-1);
4346 unsafe {
4347 transmute(simd_or(
4348 simd_and(a, transmute(b)),
4349 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4350 ))
4351 }
4352}
4353#[doc = "Bitwise Select."]
4354#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_f32)"]
4355#[inline]
4356#[target_feature(enable = "neon")]
4357#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4358#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4359#[cfg_attr(
4360 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4361 assert_instr(bsl)
4362)]
4363#[cfg_attr(
4364 not(target_arch = "arm"),
4365 stable(feature = "neon_intrinsics", since = "1.59.0")
4366)]
4367#[cfg_attr(
4368 target_arch = "arm",
4369 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4370)]
4371pub fn vbslq_f32(a: uint32x4_t, b: float32x4_t, c: float32x4_t) -> float32x4_t {
4372 let not = int32x4_t::splat(-1);
4373 unsafe {
4374 transmute(simd_or(
4375 simd_and(a, transmute(b)),
4376 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4377 ))
4378 }
4379}
4380#[doc = "Bitwise Select."]
4381#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_p16)"]
4382#[inline]
4383#[target_feature(enable = "neon")]
4384#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4385#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4386#[cfg_attr(
4387 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4388 assert_instr(bsl)
4389)]
4390#[cfg_attr(
4391 not(target_arch = "arm"),
4392 stable(feature = "neon_intrinsics", since = "1.59.0")
4393)]
4394#[cfg_attr(
4395 target_arch = "arm",
4396 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4397)]
4398pub fn vbslq_p16(a: uint16x8_t, b: poly16x8_t, c: poly16x8_t) -> poly16x8_t {
4399 let not = int16x8_t::splat(-1);
4400 unsafe {
4401 transmute(simd_or(
4402 simd_and(a, transmute(b)),
4403 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4404 ))
4405 }
4406}
4407#[doc = "Bitwise Select."]
4408#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_p8)"]
4409#[inline]
4410#[target_feature(enable = "neon")]
4411#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4412#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4413#[cfg_attr(
4414 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4415 assert_instr(bsl)
4416)]
4417#[cfg_attr(
4418 not(target_arch = "arm"),
4419 stable(feature = "neon_intrinsics", since = "1.59.0")
4420)]
4421#[cfg_attr(
4422 target_arch = "arm",
4423 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4424)]
4425pub fn vbslq_p8(a: uint8x16_t, b: poly8x16_t, c: poly8x16_t) -> poly8x16_t {
4426 let not = int8x16_t::splat(-1);
4427 unsafe {
4428 transmute(simd_or(
4429 simd_and(a, transmute(b)),
4430 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4431 ))
4432 }
4433}
4434#[doc = "Bitwise Select."]
4435#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_s16)"]
4436#[inline]
4437#[target_feature(enable = "neon")]
4438#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4439#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4440#[cfg_attr(
4441 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4442 assert_instr(bsl)
4443)]
4444#[cfg_attr(
4445 not(target_arch = "arm"),
4446 stable(feature = "neon_intrinsics", since = "1.59.0")
4447)]
4448#[cfg_attr(
4449 target_arch = "arm",
4450 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4451)]
4452pub fn vbslq_s16(a: uint16x8_t, b: int16x8_t, c: int16x8_t) -> int16x8_t {
4453 let not = int16x8_t::splat(-1);
4454 unsafe {
4455 transmute(simd_or(
4456 simd_and(a, transmute(b)),
4457 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4458 ))
4459 }
4460}
4461#[doc = "Bitwise Select."]
4462#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_s32)"]
4463#[inline]
4464#[target_feature(enable = "neon")]
4465#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4466#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4467#[cfg_attr(
4468 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4469 assert_instr(bsl)
4470)]
4471#[cfg_attr(
4472 not(target_arch = "arm"),
4473 stable(feature = "neon_intrinsics", since = "1.59.0")
4474)]
4475#[cfg_attr(
4476 target_arch = "arm",
4477 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4478)]
4479pub fn vbslq_s32(a: uint32x4_t, b: int32x4_t, c: int32x4_t) -> int32x4_t {
4480 let not = int32x4_t::splat(-1);
4481 unsafe {
4482 transmute(simd_or(
4483 simd_and(a, transmute(b)),
4484 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4485 ))
4486 }
4487}
4488#[doc = "Bitwise Select."]
4489#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_s64)"]
4490#[inline]
4491#[target_feature(enable = "neon")]
4492#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4493#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4494#[cfg_attr(
4495 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4496 assert_instr(bsl)
4497)]
4498#[cfg_attr(
4499 not(target_arch = "arm"),
4500 stable(feature = "neon_intrinsics", since = "1.59.0")
4501)]
4502#[cfg_attr(
4503 target_arch = "arm",
4504 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4505)]
4506pub fn vbslq_s64(a: uint64x2_t, b: int64x2_t, c: int64x2_t) -> int64x2_t {
4507 let not = int64x2_t::splat(-1);
4508 unsafe {
4509 transmute(simd_or(
4510 simd_and(a, transmute(b)),
4511 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4512 ))
4513 }
4514}
4515#[doc = "Bitwise Select."]
4516#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_s8)"]
4517#[inline]
4518#[target_feature(enable = "neon")]
4519#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4520#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4521#[cfg_attr(
4522 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4523 assert_instr(bsl)
4524)]
4525#[cfg_attr(
4526 not(target_arch = "arm"),
4527 stable(feature = "neon_intrinsics", since = "1.59.0")
4528)]
4529#[cfg_attr(
4530 target_arch = "arm",
4531 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4532)]
4533pub fn vbslq_s8(a: uint8x16_t, b: int8x16_t, c: int8x16_t) -> int8x16_t {
4534 let not = int8x16_t::splat(-1);
4535 unsafe {
4536 transmute(simd_or(
4537 simd_and(a, transmute(b)),
4538 simd_and(simd_xor(a, transmute(not)), transmute(c)),
4539 ))
4540 }
4541}
4542#[doc = "Bitwise Select."]
4543#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_u16)"]
4544#[inline]
4545#[target_feature(enable = "neon")]
4546#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4547#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4548#[cfg_attr(
4549 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4550 assert_instr(bsl)
4551)]
4552#[cfg_attr(
4553 not(target_arch = "arm"),
4554 stable(feature = "neon_intrinsics", since = "1.59.0")
4555)]
4556#[cfg_attr(
4557 target_arch = "arm",
4558 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4559)]
4560pub fn vbsl_u16(a: uint16x4_t, b: uint16x4_t, c: uint16x4_t) -> uint16x4_t {
4561 let not = int16x4_t::splat(-1);
4562 unsafe {
4563 transmute(simd_or(
4564 simd_and(a, b),
4565 simd_and(simd_xor(a, transmute(not)), c),
4566 ))
4567 }
4568}
4569#[doc = "Bitwise Select."]
4570#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_u32)"]
4571#[inline]
4572#[target_feature(enable = "neon")]
4573#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4574#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4575#[cfg_attr(
4576 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4577 assert_instr(bsl)
4578)]
4579#[cfg_attr(
4580 not(target_arch = "arm"),
4581 stable(feature = "neon_intrinsics", since = "1.59.0")
4582)]
4583#[cfg_attr(
4584 target_arch = "arm",
4585 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4586)]
4587pub fn vbsl_u32(a: uint32x2_t, b: uint32x2_t, c: uint32x2_t) -> uint32x2_t {
4588 let not = int32x2_t::splat(-1);
4589 unsafe {
4590 transmute(simd_or(
4591 simd_and(a, b),
4592 simd_and(simd_xor(a, transmute(not)), c),
4593 ))
4594 }
4595}
4596#[doc = "Bitwise Select."]
4597#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_u64)"]
4598#[inline]
4599#[target_feature(enable = "neon")]
4600#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4601#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4602#[cfg_attr(
4603 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4604 assert_instr(bsl)
4605)]
4606#[cfg_attr(
4607 not(target_arch = "arm"),
4608 stable(feature = "neon_intrinsics", since = "1.59.0")
4609)]
4610#[cfg_attr(
4611 target_arch = "arm",
4612 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4613)]
4614pub fn vbsl_u64(a: uint64x1_t, b: uint64x1_t, c: uint64x1_t) -> uint64x1_t {
4615 let not = int64x1_t::splat(-1);
4616 unsafe {
4617 transmute(simd_or(
4618 simd_and(a, b),
4619 simd_and(simd_xor(a, transmute(not)), c),
4620 ))
4621 }
4622}
4623#[doc = "Bitwise Select."]
4624#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbsl_u8)"]
4625#[inline]
4626#[target_feature(enable = "neon")]
4627#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4628#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4629#[cfg_attr(
4630 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4631 assert_instr(bsl)
4632)]
4633#[cfg_attr(
4634 not(target_arch = "arm"),
4635 stable(feature = "neon_intrinsics", since = "1.59.0")
4636)]
4637#[cfg_attr(
4638 target_arch = "arm",
4639 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4640)]
4641pub fn vbsl_u8(a: uint8x8_t, b: uint8x8_t, c: uint8x8_t) -> uint8x8_t {
4642 let not = int8x8_t::splat(-1);
4643 unsafe {
4644 transmute(simd_or(
4645 simd_and(a, b),
4646 simd_and(simd_xor(a, transmute(not)), c),
4647 ))
4648 }
4649}
4650#[doc = "Bitwise Select."]
4651#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_u16)"]
4652#[inline]
4653#[target_feature(enable = "neon")]
4654#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4655#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4656#[cfg_attr(
4657 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4658 assert_instr(bsl)
4659)]
4660#[cfg_attr(
4661 not(target_arch = "arm"),
4662 stable(feature = "neon_intrinsics", since = "1.59.0")
4663)]
4664#[cfg_attr(
4665 target_arch = "arm",
4666 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4667)]
4668pub fn vbslq_u16(a: uint16x8_t, b: uint16x8_t, c: uint16x8_t) -> uint16x8_t {
4669 let not = int16x8_t::splat(-1);
4670 unsafe {
4671 transmute(simd_or(
4672 simd_and(a, b),
4673 simd_and(simd_xor(a, transmute(not)), c),
4674 ))
4675 }
4676}
4677#[doc = "Bitwise Select."]
4678#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_u32)"]
4679#[inline]
4680#[target_feature(enable = "neon")]
4681#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4682#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4683#[cfg_attr(
4684 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4685 assert_instr(bsl)
4686)]
4687#[cfg_attr(
4688 not(target_arch = "arm"),
4689 stable(feature = "neon_intrinsics", since = "1.59.0")
4690)]
4691#[cfg_attr(
4692 target_arch = "arm",
4693 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4694)]
4695pub fn vbslq_u32(a: uint32x4_t, b: uint32x4_t, c: uint32x4_t) -> uint32x4_t {
4696 let not = int32x4_t::splat(-1);
4697 unsafe {
4698 transmute(simd_or(
4699 simd_and(a, b),
4700 simd_and(simd_xor(a, transmute(not)), c),
4701 ))
4702 }
4703}
4704#[doc = "Bitwise Select."]
4705#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_u64)"]
4706#[inline]
4707#[target_feature(enable = "neon")]
4708#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4709#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4710#[cfg_attr(
4711 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4712 assert_instr(bsl)
4713)]
4714#[cfg_attr(
4715 not(target_arch = "arm"),
4716 stable(feature = "neon_intrinsics", since = "1.59.0")
4717)]
4718#[cfg_attr(
4719 target_arch = "arm",
4720 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4721)]
4722pub fn vbslq_u64(a: uint64x2_t, b: uint64x2_t, c: uint64x2_t) -> uint64x2_t {
4723 let not = int64x2_t::splat(-1);
4724 unsafe {
4725 transmute(simd_or(
4726 simd_and(a, b),
4727 simd_and(simd_xor(a, transmute(not)), c),
4728 ))
4729 }
4730}
4731#[doc = "Bitwise Select."]
4732#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vbslq_u8)"]
4733#[inline]
4734#[target_feature(enable = "neon")]
4735#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4736#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vbsl))]
4737#[cfg_attr(
4738 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4739 assert_instr(bsl)
4740)]
4741#[cfg_attr(
4742 not(target_arch = "arm"),
4743 stable(feature = "neon_intrinsics", since = "1.59.0")
4744)]
4745#[cfg_attr(
4746 target_arch = "arm",
4747 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4748)]
4749pub fn vbslq_u8(a: uint8x16_t, b: uint8x16_t, c: uint8x16_t) -> uint8x16_t {
4750 let not = int8x16_t::splat(-1);
4751 unsafe {
4752 transmute(simd_or(
4753 simd_and(a, b),
4754 simd_and(simd_xor(a, transmute(not)), c),
4755 ))
4756 }
4757}
4758#[doc = "Floating-point absolute compare greater than or equal"]
4759#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcage_f16)"]
4760#[inline]
4761#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
4762#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacge.f16"))]
4763#[cfg_attr(
4764 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4765 assert_instr(facge)
4766)]
4767#[target_feature(enable = "neon,fp16")]
4768#[cfg_attr(
4769 not(target_arch = "arm"),
4770 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
4771)]
4772#[cfg_attr(
4773 target_arch = "arm",
4774 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4775)]
4776#[cfg(not(target_arch = "arm64ec"))]
4777pub fn vcage_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t {
4778 unsafe extern "unadjusted" {
4779 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vacge.v4i16.v4f16")]
4780 #[cfg_attr(
4781 any(target_arch = "aarch64", target_arch = "arm64ec"),
4782 link_name = "llvm.aarch64.neon.facge.v4i16.v4f16"
4783 )]
4784 fn _vcage_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t;
4785 }
4786 unsafe { _vcage_f16(a, b) }
4787}
4788#[doc = "Floating-point absolute compare greater than or equal"]
4789#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcageq_f16)"]
4790#[inline]
4791#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
4792#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacge.f16"))]
4793#[cfg_attr(
4794 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4795 assert_instr(facge)
4796)]
4797#[target_feature(enable = "neon,fp16")]
4798#[cfg_attr(
4799 not(target_arch = "arm"),
4800 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
4801)]
4802#[cfg_attr(
4803 target_arch = "arm",
4804 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4805)]
4806#[cfg(not(target_arch = "arm64ec"))]
4807pub fn vcageq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t {
4808 unsafe extern "unadjusted" {
4809 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vacge.v8i16.v8f16")]
4810 #[cfg_attr(
4811 any(target_arch = "aarch64", target_arch = "arm64ec"),
4812 link_name = "llvm.aarch64.neon.facge.v8i16.v8f16"
4813 )]
4814 fn _vcageq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t;
4815 }
4816 unsafe { _vcageq_f16(a, b) }
4817}
4818#[doc = "Floating-point absolute compare greater than or equal"]
4819#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcage_f32)"]
4820#[inline]
4821#[target_feature(enable = "neon")]
4822#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4823#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacge.f32"))]
4824#[cfg_attr(
4825 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4826 assert_instr(facge)
4827)]
4828#[cfg_attr(
4829 not(target_arch = "arm"),
4830 stable(feature = "neon_intrinsics", since = "1.59.0")
4831)]
4832#[cfg_attr(
4833 target_arch = "arm",
4834 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4835)]
4836pub fn vcage_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
4837 unsafe extern "unadjusted" {
4838 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vacge.v2i32.v2f32")]
4839 #[cfg_attr(
4840 any(target_arch = "aarch64", target_arch = "arm64ec"),
4841 link_name = "llvm.aarch64.neon.facge.v2i32.v2f32"
4842 )]
4843 fn _vcage_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t;
4844 }
4845 unsafe { _vcage_f32(a, b) }
4846}
4847#[doc = "Floating-point absolute compare greater than or equal"]
4848#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcageq_f32)"]
4849#[inline]
4850#[target_feature(enable = "neon")]
4851#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4852#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacge.f32"))]
4853#[cfg_attr(
4854 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4855 assert_instr(facge)
4856)]
4857#[cfg_attr(
4858 not(target_arch = "arm"),
4859 stable(feature = "neon_intrinsics", since = "1.59.0")
4860)]
4861#[cfg_attr(
4862 target_arch = "arm",
4863 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4864)]
4865pub fn vcageq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
4866 unsafe extern "unadjusted" {
4867 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vacge.v4i32.v4f32")]
4868 #[cfg_attr(
4869 any(target_arch = "aarch64", target_arch = "arm64ec"),
4870 link_name = "llvm.aarch64.neon.facge.v4i32.v4f32"
4871 )]
4872 fn _vcageq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t;
4873 }
4874 unsafe { _vcageq_f32(a, b) }
4875}
4876#[doc = "Floating-point absolute compare greater than"]
4877#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcagt_f16)"]
4878#[inline]
4879#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
4880#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacgt.f16"))]
4881#[cfg_attr(
4882 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4883 assert_instr(facgt)
4884)]
4885#[target_feature(enable = "neon,fp16")]
4886#[cfg_attr(
4887 not(target_arch = "arm"),
4888 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
4889)]
4890#[cfg_attr(
4891 target_arch = "arm",
4892 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4893)]
4894#[cfg(not(target_arch = "arm64ec"))]
4895pub fn vcagt_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t {
4896 unsafe extern "unadjusted" {
4897 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vacgt.v4i16.v4f16")]
4898 #[cfg_attr(
4899 any(target_arch = "aarch64", target_arch = "arm64ec"),
4900 link_name = "llvm.aarch64.neon.facgt.v4i16.v4f16"
4901 )]
4902 fn _vcagt_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t;
4903 }
4904 unsafe { _vcagt_f16(a, b) }
4905}
4906#[doc = "Floating-point absolute compare greater than"]
4907#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcagtq_f16)"]
4908#[inline]
4909#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
4910#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacgt.f16"))]
4911#[cfg_attr(
4912 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4913 assert_instr(facgt)
4914)]
4915#[target_feature(enable = "neon,fp16")]
4916#[cfg_attr(
4917 not(target_arch = "arm"),
4918 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
4919)]
4920#[cfg_attr(
4921 target_arch = "arm",
4922 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4923)]
4924#[cfg(not(target_arch = "arm64ec"))]
4925pub fn vcagtq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t {
4926 unsafe extern "unadjusted" {
4927 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vacgt.v8i16.v8f16")]
4928 #[cfg_attr(
4929 any(target_arch = "aarch64", target_arch = "arm64ec"),
4930 link_name = "llvm.aarch64.neon.facgt.v8i16.v8f16"
4931 )]
4932 fn _vcagtq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t;
4933 }
4934 unsafe { _vcagtq_f16(a, b) }
4935}
4936#[doc = "Floating-point absolute compare greater than"]
4937#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcagt_f32)"]
4938#[inline]
4939#[target_feature(enable = "neon")]
4940#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4941#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacgt.f32"))]
4942#[cfg_attr(
4943 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4944 assert_instr(facgt)
4945)]
4946#[cfg_attr(
4947 not(target_arch = "arm"),
4948 stable(feature = "neon_intrinsics", since = "1.59.0")
4949)]
4950#[cfg_attr(
4951 target_arch = "arm",
4952 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4953)]
4954pub fn vcagt_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
4955 unsafe extern "unadjusted" {
4956 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vacgt.v2i32.v2f32")]
4957 #[cfg_attr(
4958 any(target_arch = "aarch64", target_arch = "arm64ec"),
4959 link_name = "llvm.aarch64.neon.facgt.v2i32.v2f32"
4960 )]
4961 fn _vcagt_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t;
4962 }
4963 unsafe { _vcagt_f32(a, b) }
4964}
4965#[doc = "Floating-point absolute compare greater than"]
4966#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcagtq_f32)"]
4967#[inline]
4968#[target_feature(enable = "neon")]
4969#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
4970#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacgt.f32"))]
4971#[cfg_attr(
4972 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
4973 assert_instr(facgt)
4974)]
4975#[cfg_attr(
4976 not(target_arch = "arm"),
4977 stable(feature = "neon_intrinsics", since = "1.59.0")
4978)]
4979#[cfg_attr(
4980 target_arch = "arm",
4981 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
4982)]
4983pub fn vcagtq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
4984 unsafe extern "unadjusted" {
4985 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vacgt.v4i32.v4f32")]
4986 #[cfg_attr(
4987 any(target_arch = "aarch64", target_arch = "arm64ec"),
4988 link_name = "llvm.aarch64.neon.facgt.v4i32.v4f32"
4989 )]
4990 fn _vcagtq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t;
4991 }
4992 unsafe { _vcagtq_f32(a, b) }
4993}
4994#[doc = "Floating-point absolute compare less than or equal"]
4995#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcale_f16)"]
4996#[inline]
4997#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
4998#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacge.f16"))]
4999#[cfg_attr(
5000 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5001 assert_instr(facge)
5002)]
5003#[target_feature(enable = "neon,fp16")]
5004#[cfg_attr(
5005 not(target_arch = "arm"),
5006 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5007)]
5008#[cfg_attr(
5009 target_arch = "arm",
5010 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5011)]
5012#[cfg(not(target_arch = "arm64ec"))]
5013pub fn vcale_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t {
5014 vcage_f16(b, a)
5015}
5016#[doc = "Floating-point absolute compare less than or equal"]
5017#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcaleq_f16)"]
5018#[inline]
5019#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5020#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacge.f16"))]
5021#[cfg_attr(
5022 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5023 assert_instr(facge)
5024)]
5025#[target_feature(enable = "neon,fp16")]
5026#[cfg_attr(
5027 not(target_arch = "arm"),
5028 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5029)]
5030#[cfg_attr(
5031 target_arch = "arm",
5032 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5033)]
5034#[cfg(not(target_arch = "arm64ec"))]
5035pub fn vcaleq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t {
5036 vcageq_f16(b, a)
5037}
5038#[doc = "Floating-point absolute compare less than or equal"]
5039#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcale_f32)"]
5040#[inline]
5041#[target_feature(enable = "neon")]
5042#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5043#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacge.f32"))]
5044#[cfg_attr(
5045 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5046 assert_instr(facge)
5047)]
5048#[cfg_attr(
5049 not(target_arch = "arm"),
5050 stable(feature = "neon_intrinsics", since = "1.59.0")
5051)]
5052#[cfg_attr(
5053 target_arch = "arm",
5054 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5055)]
5056pub fn vcale_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
5057 vcage_f32(b, a)
5058}
5059#[doc = "Floating-point absolute compare less than or equal"]
5060#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcaleq_f32)"]
5061#[inline]
5062#[target_feature(enable = "neon")]
5063#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5064#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacge.f32"))]
5065#[cfg_attr(
5066 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5067 assert_instr(facge)
5068)]
5069#[cfg_attr(
5070 not(target_arch = "arm"),
5071 stable(feature = "neon_intrinsics", since = "1.59.0")
5072)]
5073#[cfg_attr(
5074 target_arch = "arm",
5075 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5076)]
5077pub fn vcaleq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
5078 vcageq_f32(b, a)
5079}
5080#[doc = "Floating-point absolute compare less than"]
5081#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcalt_f16)"]
5082#[inline]
5083#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5084#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacgt.f16"))]
5085#[cfg_attr(
5086 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5087 assert_instr(facgt)
5088)]
5089#[target_feature(enable = "neon,fp16")]
5090#[cfg_attr(
5091 not(target_arch = "arm"),
5092 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5093)]
5094#[cfg_attr(
5095 target_arch = "arm",
5096 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5097)]
5098#[cfg(not(target_arch = "arm64ec"))]
5099pub fn vcalt_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t {
5100 vcagt_f16(b, a)
5101}
5102#[doc = "Floating-point absolute compare less than"]
5103#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcaltq_f16)"]
5104#[inline]
5105#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5106#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacgt.f16"))]
5107#[cfg_attr(
5108 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5109 assert_instr(facgt)
5110)]
5111#[target_feature(enable = "neon,fp16")]
5112#[cfg_attr(
5113 not(target_arch = "arm"),
5114 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5115)]
5116#[cfg_attr(
5117 target_arch = "arm",
5118 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5119)]
5120#[cfg(not(target_arch = "arm64ec"))]
5121pub fn vcaltq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t {
5122 vcagtq_f16(b, a)
5123}
5124#[doc = "Floating-point absolute compare less than"]
5125#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcalt_f32)"]
5126#[inline]
5127#[target_feature(enable = "neon")]
5128#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5129#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacgt.f32"))]
5130#[cfg_attr(
5131 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5132 assert_instr(facgt)
5133)]
5134#[cfg_attr(
5135 not(target_arch = "arm"),
5136 stable(feature = "neon_intrinsics", since = "1.59.0")
5137)]
5138#[cfg_attr(
5139 target_arch = "arm",
5140 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5141)]
5142pub fn vcalt_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
5143 vcagt_f32(b, a)
5144}
5145#[doc = "Floating-point absolute compare less than"]
5146#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcaltq_f32)"]
5147#[inline]
5148#[target_feature(enable = "neon")]
5149#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5150#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vacgt.f32"))]
5151#[cfg_attr(
5152 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5153 assert_instr(facgt)
5154)]
5155#[cfg_attr(
5156 not(target_arch = "arm"),
5157 stable(feature = "neon_intrinsics", since = "1.59.0")
5158)]
5159#[cfg_attr(
5160 target_arch = "arm",
5161 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5162)]
5163pub fn vcaltq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
5164 vcagtq_f32(b, a)
5165}
5166#[doc = "Floating-point compare equal"]
5167#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_f16)"]
5168#[inline]
5169#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5170#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.f16"))]
5171#[cfg_attr(
5172 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5173 assert_instr(fcmeq)
5174)]
5175#[target_feature(enable = "neon,fp16")]
5176#[cfg_attr(
5177 not(target_arch = "arm"),
5178 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5179)]
5180#[cfg_attr(
5181 target_arch = "arm",
5182 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5183)]
5184#[cfg(not(target_arch = "arm64ec"))]
5185pub fn vceq_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t {
5186 unsafe { simd_eq(a, b) }
5187}
5188#[doc = "Floating-point compare equal"]
5189#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_f16)"]
5190#[inline]
5191#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5192#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.f16"))]
5193#[cfg_attr(
5194 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5195 assert_instr(fcmeq)
5196)]
5197#[target_feature(enable = "neon,fp16")]
5198#[cfg_attr(
5199 not(target_arch = "arm"),
5200 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5201)]
5202#[cfg_attr(
5203 target_arch = "arm",
5204 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5205)]
5206#[cfg(not(target_arch = "arm64ec"))]
5207pub fn vceqq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t {
5208 unsafe { simd_eq(a, b) }
5209}
5210#[doc = "Floating-point compare equal"]
5211#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_f32)"]
5212#[inline]
5213#[target_feature(enable = "neon")]
5214#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5215#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.f32"))]
5216#[cfg_attr(
5217 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5218 assert_instr(fcmeq)
5219)]
5220#[cfg_attr(
5221 not(target_arch = "arm"),
5222 stable(feature = "neon_intrinsics", since = "1.59.0")
5223)]
5224#[cfg_attr(
5225 target_arch = "arm",
5226 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5227)]
5228pub fn vceq_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
5229 unsafe { simd_eq(a, b) }
5230}
5231#[doc = "Floating-point compare equal"]
5232#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_f32)"]
5233#[inline]
5234#[target_feature(enable = "neon")]
5235#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5236#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.f32"))]
5237#[cfg_attr(
5238 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5239 assert_instr(fcmeq)
5240)]
5241#[cfg_attr(
5242 not(target_arch = "arm"),
5243 stable(feature = "neon_intrinsics", since = "1.59.0")
5244)]
5245#[cfg_attr(
5246 target_arch = "arm",
5247 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5248)]
5249pub fn vceqq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
5250 unsafe { simd_eq(a, b) }
5251}
5252#[doc = "Compare bitwise Equal (vector)"]
5253#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_s8)"]
5254#[inline]
5255#[target_feature(enable = "neon")]
5256#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5257#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
5258#[cfg_attr(
5259 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5260 assert_instr(cmeq)
5261)]
5262#[cfg_attr(
5263 not(target_arch = "arm"),
5264 stable(feature = "neon_intrinsics", since = "1.59.0")
5265)]
5266#[cfg_attr(
5267 target_arch = "arm",
5268 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5269)]
5270pub fn vceq_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
5271 unsafe { simd_eq(a, b) }
5272}
5273#[doc = "Compare bitwise Equal (vector)"]
5274#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_s8)"]
5275#[inline]
5276#[target_feature(enable = "neon")]
5277#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5278#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
5279#[cfg_attr(
5280 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5281 assert_instr(cmeq)
5282)]
5283#[cfg_attr(
5284 not(target_arch = "arm"),
5285 stable(feature = "neon_intrinsics", since = "1.59.0")
5286)]
5287#[cfg_attr(
5288 target_arch = "arm",
5289 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5290)]
5291pub fn vceqq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
5292 unsafe { simd_eq(a, b) }
5293}
5294#[doc = "Compare bitwise Equal (vector)"]
5295#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_s16)"]
5296#[inline]
5297#[target_feature(enable = "neon")]
5298#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5299#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))]
5300#[cfg_attr(
5301 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5302 assert_instr(cmeq)
5303)]
5304#[cfg_attr(
5305 not(target_arch = "arm"),
5306 stable(feature = "neon_intrinsics", since = "1.59.0")
5307)]
5308#[cfg_attr(
5309 target_arch = "arm",
5310 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5311)]
5312pub fn vceq_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
5313 unsafe { simd_eq(a, b) }
5314}
5315#[doc = "Compare bitwise Equal (vector)"]
5316#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_s16)"]
5317#[inline]
5318#[target_feature(enable = "neon")]
5319#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5320#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))]
5321#[cfg_attr(
5322 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5323 assert_instr(cmeq)
5324)]
5325#[cfg_attr(
5326 not(target_arch = "arm"),
5327 stable(feature = "neon_intrinsics", since = "1.59.0")
5328)]
5329#[cfg_attr(
5330 target_arch = "arm",
5331 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5332)]
5333pub fn vceqq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
5334 unsafe { simd_eq(a, b) }
5335}
5336#[doc = "Compare bitwise Equal (vector)"]
5337#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_s32)"]
5338#[inline]
5339#[target_feature(enable = "neon")]
5340#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5341#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))]
5342#[cfg_attr(
5343 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5344 assert_instr(cmeq)
5345)]
5346#[cfg_attr(
5347 not(target_arch = "arm"),
5348 stable(feature = "neon_intrinsics", since = "1.59.0")
5349)]
5350#[cfg_attr(
5351 target_arch = "arm",
5352 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5353)]
5354pub fn vceq_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
5355 unsafe { simd_eq(a, b) }
5356}
5357#[doc = "Compare bitwise Equal (vector)"]
5358#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_s32)"]
5359#[inline]
5360#[target_feature(enable = "neon")]
5361#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5362#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))]
5363#[cfg_attr(
5364 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5365 assert_instr(cmeq)
5366)]
5367#[cfg_attr(
5368 not(target_arch = "arm"),
5369 stable(feature = "neon_intrinsics", since = "1.59.0")
5370)]
5371#[cfg_attr(
5372 target_arch = "arm",
5373 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5374)]
5375pub fn vceqq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
5376 unsafe { simd_eq(a, b) }
5377}
5378#[doc = "Compare bitwise Equal (vector)"]
5379#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_u8)"]
5380#[inline]
5381#[target_feature(enable = "neon")]
5382#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5383#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
5384#[cfg_attr(
5385 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5386 assert_instr(cmeq)
5387)]
5388#[cfg_attr(
5389 not(target_arch = "arm"),
5390 stable(feature = "neon_intrinsics", since = "1.59.0")
5391)]
5392#[cfg_attr(
5393 target_arch = "arm",
5394 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5395)]
5396pub fn vceq_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
5397 unsafe { simd_eq(a, b) }
5398}
5399#[doc = "Compare bitwise Equal (vector)"]
5400#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_u8)"]
5401#[inline]
5402#[target_feature(enable = "neon")]
5403#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5404#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
5405#[cfg_attr(
5406 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5407 assert_instr(cmeq)
5408)]
5409#[cfg_attr(
5410 not(target_arch = "arm"),
5411 stable(feature = "neon_intrinsics", since = "1.59.0")
5412)]
5413#[cfg_attr(
5414 target_arch = "arm",
5415 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5416)]
5417pub fn vceqq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
5418 unsafe { simd_eq(a, b) }
5419}
5420#[doc = "Compare bitwise Equal (vector)"]
5421#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_u16)"]
5422#[inline]
5423#[target_feature(enable = "neon")]
5424#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5425#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))]
5426#[cfg_attr(
5427 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5428 assert_instr(cmeq)
5429)]
5430#[cfg_attr(
5431 not(target_arch = "arm"),
5432 stable(feature = "neon_intrinsics", since = "1.59.0")
5433)]
5434#[cfg_attr(
5435 target_arch = "arm",
5436 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5437)]
5438pub fn vceq_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
5439 unsafe { simd_eq(a, b) }
5440}
5441#[doc = "Compare bitwise Equal (vector)"]
5442#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_u16)"]
5443#[inline]
5444#[target_feature(enable = "neon")]
5445#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5446#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))]
5447#[cfg_attr(
5448 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5449 assert_instr(cmeq)
5450)]
5451#[cfg_attr(
5452 not(target_arch = "arm"),
5453 stable(feature = "neon_intrinsics", since = "1.59.0")
5454)]
5455#[cfg_attr(
5456 target_arch = "arm",
5457 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5458)]
5459pub fn vceqq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
5460 unsafe { simd_eq(a, b) }
5461}
5462#[doc = "Compare bitwise Equal (vector)"]
5463#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_u32)"]
5464#[inline]
5465#[target_feature(enable = "neon")]
5466#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5467#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))]
5468#[cfg_attr(
5469 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5470 assert_instr(cmeq)
5471)]
5472#[cfg_attr(
5473 not(target_arch = "arm"),
5474 stable(feature = "neon_intrinsics", since = "1.59.0")
5475)]
5476#[cfg_attr(
5477 target_arch = "arm",
5478 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5479)]
5480pub fn vceq_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
5481 unsafe { simd_eq(a, b) }
5482}
5483#[doc = "Compare bitwise Equal (vector)"]
5484#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_u32)"]
5485#[inline]
5486#[target_feature(enable = "neon")]
5487#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5488#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))]
5489#[cfg_attr(
5490 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5491 assert_instr(cmeq)
5492)]
5493#[cfg_attr(
5494 not(target_arch = "arm"),
5495 stable(feature = "neon_intrinsics", since = "1.59.0")
5496)]
5497#[cfg_attr(
5498 target_arch = "arm",
5499 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5500)]
5501pub fn vceqq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
5502 unsafe { simd_eq(a, b) }
5503}
5504#[doc = "Compare bitwise Equal (vector)"]
5505#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceq_p8)"]
5506#[inline]
5507#[target_feature(enable = "neon")]
5508#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5509#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
5510#[cfg_attr(
5511 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5512 assert_instr(cmeq)
5513)]
5514#[cfg_attr(
5515 not(target_arch = "arm"),
5516 stable(feature = "neon_intrinsics", since = "1.59.0")
5517)]
5518#[cfg_attr(
5519 target_arch = "arm",
5520 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5521)]
5522pub fn vceq_p8(a: poly8x8_t, b: poly8x8_t) -> uint8x8_t {
5523 unsafe { simd_eq(a, b) }
5524}
5525#[doc = "Compare bitwise Equal (vector)"]
5526#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vceqq_p8)"]
5527#[inline]
5528#[target_feature(enable = "neon")]
5529#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5530#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))]
5531#[cfg_attr(
5532 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5533 assert_instr(cmeq)
5534)]
5535#[cfg_attr(
5536 not(target_arch = "arm"),
5537 stable(feature = "neon_intrinsics", since = "1.59.0")
5538)]
5539#[cfg_attr(
5540 target_arch = "arm",
5541 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5542)]
5543pub fn vceqq_p8(a: poly8x16_t, b: poly8x16_t) -> uint8x16_t {
5544 unsafe { simd_eq(a, b) }
5545}
5546#[doc = "Floating-point compare greater than or equal"]
5547#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcge_f16)"]
5548#[inline]
5549#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5550#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f16"))]
5551#[cfg_attr(
5552 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5553 assert_instr(fcmge)
5554)]
5555#[target_feature(enable = "neon,fp16")]
5556#[cfg_attr(
5557 not(target_arch = "arm"),
5558 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5559)]
5560#[cfg_attr(
5561 target_arch = "arm",
5562 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5563)]
5564#[cfg(not(target_arch = "arm64ec"))]
5565pub fn vcge_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t {
5566 unsafe { simd_ge(a, b) }
5567}
5568#[doc = "Floating-point compare greater than or equal"]
5569#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgeq_f16)"]
5570#[inline]
5571#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5572#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f16"))]
5573#[cfg_attr(
5574 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5575 assert_instr(fcmge)
5576)]
5577#[target_feature(enable = "neon,fp16")]
5578#[cfg_attr(
5579 not(target_arch = "arm"),
5580 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5581)]
5582#[cfg_attr(
5583 target_arch = "arm",
5584 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5585)]
5586#[cfg(not(target_arch = "arm64ec"))]
5587pub fn vcgeq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t {
5588 unsafe { simd_ge(a, b) }
5589}
5590#[doc = "Floating-point compare greater than or equal"]
5591#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcge_f32)"]
5592#[inline]
5593#[target_feature(enable = "neon")]
5594#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5595#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))]
5596#[cfg_attr(
5597 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5598 assert_instr(fcmge)
5599)]
5600#[cfg_attr(
5601 not(target_arch = "arm"),
5602 stable(feature = "neon_intrinsics", since = "1.59.0")
5603)]
5604#[cfg_attr(
5605 target_arch = "arm",
5606 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5607)]
5608pub fn vcge_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
5609 unsafe { simd_ge(a, b) }
5610}
5611#[doc = "Floating-point compare greater than or equal"]
5612#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgeq_f32)"]
5613#[inline]
5614#[target_feature(enable = "neon")]
5615#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5616#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))]
5617#[cfg_attr(
5618 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5619 assert_instr(fcmge)
5620)]
5621#[cfg_attr(
5622 not(target_arch = "arm"),
5623 stable(feature = "neon_intrinsics", since = "1.59.0")
5624)]
5625#[cfg_attr(
5626 target_arch = "arm",
5627 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5628)]
5629pub fn vcgeq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
5630 unsafe { simd_ge(a, b) }
5631}
5632#[doc = "Compare signed greater than or equal"]
5633#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcge_s8)"]
5634#[inline]
5635#[target_feature(enable = "neon")]
5636#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5637#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))]
5638#[cfg_attr(
5639 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5640 assert_instr(cmge)
5641)]
5642#[cfg_attr(
5643 not(target_arch = "arm"),
5644 stable(feature = "neon_intrinsics", since = "1.59.0")
5645)]
5646#[cfg_attr(
5647 target_arch = "arm",
5648 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5649)]
5650pub fn vcge_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
5651 unsafe { simd_ge(a, b) }
5652}
5653#[doc = "Compare signed greater than or equal"]
5654#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgeq_s8)"]
5655#[inline]
5656#[target_feature(enable = "neon")]
5657#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5658#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))]
5659#[cfg_attr(
5660 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5661 assert_instr(cmge)
5662)]
5663#[cfg_attr(
5664 not(target_arch = "arm"),
5665 stable(feature = "neon_intrinsics", since = "1.59.0")
5666)]
5667#[cfg_attr(
5668 target_arch = "arm",
5669 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5670)]
5671pub fn vcgeq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
5672 unsafe { simd_ge(a, b) }
5673}
5674#[doc = "Compare signed greater than or equal"]
5675#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcge_s16)"]
5676#[inline]
5677#[target_feature(enable = "neon")]
5678#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5679#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))]
5680#[cfg_attr(
5681 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5682 assert_instr(cmge)
5683)]
5684#[cfg_attr(
5685 not(target_arch = "arm"),
5686 stable(feature = "neon_intrinsics", since = "1.59.0")
5687)]
5688#[cfg_attr(
5689 target_arch = "arm",
5690 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5691)]
5692pub fn vcge_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
5693 unsafe { simd_ge(a, b) }
5694}
5695#[doc = "Compare signed greater than or equal"]
5696#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgeq_s16)"]
5697#[inline]
5698#[target_feature(enable = "neon")]
5699#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5700#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))]
5701#[cfg_attr(
5702 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5703 assert_instr(cmge)
5704)]
5705#[cfg_attr(
5706 not(target_arch = "arm"),
5707 stable(feature = "neon_intrinsics", since = "1.59.0")
5708)]
5709#[cfg_attr(
5710 target_arch = "arm",
5711 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5712)]
5713pub fn vcgeq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
5714 unsafe { simd_ge(a, b) }
5715}
5716#[doc = "Compare signed greater than or equal"]
5717#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcge_s32)"]
5718#[inline]
5719#[target_feature(enable = "neon")]
5720#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5721#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))]
5722#[cfg_attr(
5723 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5724 assert_instr(cmge)
5725)]
5726#[cfg_attr(
5727 not(target_arch = "arm"),
5728 stable(feature = "neon_intrinsics", since = "1.59.0")
5729)]
5730#[cfg_attr(
5731 target_arch = "arm",
5732 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5733)]
5734pub fn vcge_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
5735 unsafe { simd_ge(a, b) }
5736}
5737#[doc = "Compare signed greater than or equal"]
5738#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgeq_s32)"]
5739#[inline]
5740#[target_feature(enable = "neon")]
5741#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5742#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))]
5743#[cfg_attr(
5744 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5745 assert_instr(cmge)
5746)]
5747#[cfg_attr(
5748 not(target_arch = "arm"),
5749 stable(feature = "neon_intrinsics", since = "1.59.0")
5750)]
5751#[cfg_attr(
5752 target_arch = "arm",
5753 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5754)]
5755pub fn vcgeq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
5756 unsafe { simd_ge(a, b) }
5757}
5758#[doc = "Compare unsigned greater than or equal"]
5759#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcge_u8)"]
5760#[inline]
5761#[target_feature(enable = "neon")]
5762#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5763#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))]
5764#[cfg_attr(
5765 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5766 assert_instr(cmhs)
5767)]
5768#[cfg_attr(
5769 not(target_arch = "arm"),
5770 stable(feature = "neon_intrinsics", since = "1.59.0")
5771)]
5772#[cfg_attr(
5773 target_arch = "arm",
5774 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5775)]
5776pub fn vcge_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
5777 unsafe { simd_ge(a, b) }
5778}
5779#[doc = "Compare unsigned greater than or equal"]
5780#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgeq_u8)"]
5781#[inline]
5782#[target_feature(enable = "neon")]
5783#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5784#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))]
5785#[cfg_attr(
5786 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5787 assert_instr(cmhs)
5788)]
5789#[cfg_attr(
5790 not(target_arch = "arm"),
5791 stable(feature = "neon_intrinsics", since = "1.59.0")
5792)]
5793#[cfg_attr(
5794 target_arch = "arm",
5795 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5796)]
5797pub fn vcgeq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
5798 unsafe { simd_ge(a, b) }
5799}
5800#[doc = "Compare unsigned greater than or equal"]
5801#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcge_u16)"]
5802#[inline]
5803#[target_feature(enable = "neon")]
5804#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5805#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))]
5806#[cfg_attr(
5807 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5808 assert_instr(cmhs)
5809)]
5810#[cfg_attr(
5811 not(target_arch = "arm"),
5812 stable(feature = "neon_intrinsics", since = "1.59.0")
5813)]
5814#[cfg_attr(
5815 target_arch = "arm",
5816 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5817)]
5818pub fn vcge_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
5819 unsafe { simd_ge(a, b) }
5820}
5821#[doc = "Compare unsigned greater than or equal"]
5822#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgeq_u16)"]
5823#[inline]
5824#[target_feature(enable = "neon")]
5825#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5826#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))]
5827#[cfg_attr(
5828 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5829 assert_instr(cmhs)
5830)]
5831#[cfg_attr(
5832 not(target_arch = "arm"),
5833 stable(feature = "neon_intrinsics", since = "1.59.0")
5834)]
5835#[cfg_attr(
5836 target_arch = "arm",
5837 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5838)]
5839pub fn vcgeq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
5840 unsafe { simd_ge(a, b) }
5841}
5842#[doc = "Compare unsigned greater than or equal"]
5843#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcge_u32)"]
5844#[inline]
5845#[target_feature(enable = "neon")]
5846#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5847#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))]
5848#[cfg_attr(
5849 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5850 assert_instr(cmhs)
5851)]
5852#[cfg_attr(
5853 not(target_arch = "arm"),
5854 stable(feature = "neon_intrinsics", since = "1.59.0")
5855)]
5856#[cfg_attr(
5857 target_arch = "arm",
5858 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5859)]
5860pub fn vcge_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
5861 unsafe { simd_ge(a, b) }
5862}
5863#[doc = "Compare unsigned greater than or equal"]
5864#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgeq_u32)"]
5865#[inline]
5866#[target_feature(enable = "neon")]
5867#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5868#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))]
5869#[cfg_attr(
5870 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5871 assert_instr(cmhs)
5872)]
5873#[cfg_attr(
5874 not(target_arch = "arm"),
5875 stable(feature = "neon_intrinsics", since = "1.59.0")
5876)]
5877#[cfg_attr(
5878 target_arch = "arm",
5879 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5880)]
5881pub fn vcgeq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
5882 unsafe { simd_ge(a, b) }
5883}
5884#[doc = "Floating-point compare greater than or equal to zero"]
5885#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgez_f16)"]
5886#[inline]
5887#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5888#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f16"))]
5889#[cfg_attr(
5890 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5891 assert_instr(fcmge)
5892)]
5893#[target_feature(enable = "neon,fp16")]
5894#[cfg_attr(
5895 not(target_arch = "arm"),
5896 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5897)]
5898#[cfg_attr(
5899 target_arch = "arm",
5900 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5901)]
5902#[cfg(not(target_arch = "arm64ec"))]
5903pub fn vcgez_f16(a: float16x4_t) -> uint16x4_t {
5904 let b: f16x4 = f16x4::new(0.0, 0.0, 0.0, 0.0);
5905 unsafe { simd_ge(a, transmute(b)) }
5906}
5907#[doc = "Floating-point compare greater than or equal to zero"]
5908#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgezq_f16)"]
5909#[inline]
5910#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5911#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f16"))]
5912#[cfg_attr(
5913 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5914 assert_instr(fcmge)
5915)]
5916#[target_feature(enable = "neon,fp16")]
5917#[cfg_attr(
5918 not(target_arch = "arm"),
5919 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5920)]
5921#[cfg_attr(
5922 target_arch = "arm",
5923 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5924)]
5925#[cfg(not(target_arch = "arm64ec"))]
5926pub fn vcgezq_f16(a: float16x8_t) -> uint16x8_t {
5927 let b: f16x8 = f16x8::new(0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0);
5928 unsafe { simd_ge(a, transmute(b)) }
5929}
5930#[doc = "Floating-point compare greater than"]
5931#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgt_f16)"]
5932#[inline]
5933#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5934#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f16"))]
5935#[cfg_attr(
5936 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5937 assert_instr(fcmgt)
5938)]
5939#[target_feature(enable = "neon,fp16")]
5940#[cfg_attr(
5941 not(target_arch = "arm"),
5942 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5943)]
5944#[cfg_attr(
5945 target_arch = "arm",
5946 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5947)]
5948#[cfg(not(target_arch = "arm64ec"))]
5949pub fn vcgt_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t {
5950 unsafe { simd_gt(a, b) }
5951}
5952#[doc = "Floating-point compare greater than"]
5953#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtq_f16)"]
5954#[inline]
5955#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
5956#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f16"))]
5957#[cfg_attr(
5958 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5959 assert_instr(fcmgt)
5960)]
5961#[target_feature(enable = "neon,fp16")]
5962#[cfg_attr(
5963 not(target_arch = "arm"),
5964 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
5965)]
5966#[cfg_attr(
5967 target_arch = "arm",
5968 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5969)]
5970#[cfg(not(target_arch = "arm64ec"))]
5971pub fn vcgtq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t {
5972 unsafe { simd_gt(a, b) }
5973}
5974#[doc = "Floating-point compare greater than"]
5975#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgt_f32)"]
5976#[inline]
5977#[target_feature(enable = "neon")]
5978#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
5979#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))]
5980#[cfg_attr(
5981 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
5982 assert_instr(fcmgt)
5983)]
5984#[cfg_attr(
5985 not(target_arch = "arm"),
5986 stable(feature = "neon_intrinsics", since = "1.59.0")
5987)]
5988#[cfg_attr(
5989 target_arch = "arm",
5990 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
5991)]
5992pub fn vcgt_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
5993 unsafe { simd_gt(a, b) }
5994}
5995#[doc = "Floating-point compare greater than"]
5996#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtq_f32)"]
5997#[inline]
5998#[target_feature(enable = "neon")]
5999#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6000#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))]
6001#[cfg_attr(
6002 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6003 assert_instr(fcmgt)
6004)]
6005#[cfg_attr(
6006 not(target_arch = "arm"),
6007 stable(feature = "neon_intrinsics", since = "1.59.0")
6008)]
6009#[cfg_attr(
6010 target_arch = "arm",
6011 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6012)]
6013pub fn vcgtq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
6014 unsafe { simd_gt(a, b) }
6015}
6016#[doc = "Compare signed greater than"]
6017#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgt_s8)"]
6018#[inline]
6019#[target_feature(enable = "neon")]
6020#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6021#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))]
6022#[cfg_attr(
6023 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6024 assert_instr(cmgt)
6025)]
6026#[cfg_attr(
6027 not(target_arch = "arm"),
6028 stable(feature = "neon_intrinsics", since = "1.59.0")
6029)]
6030#[cfg_attr(
6031 target_arch = "arm",
6032 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6033)]
6034pub fn vcgt_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
6035 unsafe { simd_gt(a, b) }
6036}
6037#[doc = "Compare signed greater than"]
6038#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtq_s8)"]
6039#[inline]
6040#[target_feature(enable = "neon")]
6041#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6042#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))]
6043#[cfg_attr(
6044 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6045 assert_instr(cmgt)
6046)]
6047#[cfg_attr(
6048 not(target_arch = "arm"),
6049 stable(feature = "neon_intrinsics", since = "1.59.0")
6050)]
6051#[cfg_attr(
6052 target_arch = "arm",
6053 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6054)]
6055pub fn vcgtq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
6056 unsafe { simd_gt(a, b) }
6057}
6058#[doc = "Compare signed greater than"]
6059#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgt_s16)"]
6060#[inline]
6061#[target_feature(enable = "neon")]
6062#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6063#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))]
6064#[cfg_attr(
6065 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6066 assert_instr(cmgt)
6067)]
6068#[cfg_attr(
6069 not(target_arch = "arm"),
6070 stable(feature = "neon_intrinsics", since = "1.59.0")
6071)]
6072#[cfg_attr(
6073 target_arch = "arm",
6074 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6075)]
6076pub fn vcgt_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
6077 unsafe { simd_gt(a, b) }
6078}
6079#[doc = "Compare signed greater than"]
6080#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtq_s16)"]
6081#[inline]
6082#[target_feature(enable = "neon")]
6083#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6084#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))]
6085#[cfg_attr(
6086 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6087 assert_instr(cmgt)
6088)]
6089#[cfg_attr(
6090 not(target_arch = "arm"),
6091 stable(feature = "neon_intrinsics", since = "1.59.0")
6092)]
6093#[cfg_attr(
6094 target_arch = "arm",
6095 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6096)]
6097pub fn vcgtq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
6098 unsafe { simd_gt(a, b) }
6099}
6100#[doc = "Compare signed greater than"]
6101#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgt_s32)"]
6102#[inline]
6103#[target_feature(enable = "neon")]
6104#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6105#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))]
6106#[cfg_attr(
6107 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6108 assert_instr(cmgt)
6109)]
6110#[cfg_attr(
6111 not(target_arch = "arm"),
6112 stable(feature = "neon_intrinsics", since = "1.59.0")
6113)]
6114#[cfg_attr(
6115 target_arch = "arm",
6116 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6117)]
6118pub fn vcgt_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
6119 unsafe { simd_gt(a, b) }
6120}
6121#[doc = "Compare signed greater than"]
6122#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtq_s32)"]
6123#[inline]
6124#[target_feature(enable = "neon")]
6125#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6126#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))]
6127#[cfg_attr(
6128 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6129 assert_instr(cmgt)
6130)]
6131#[cfg_attr(
6132 not(target_arch = "arm"),
6133 stable(feature = "neon_intrinsics", since = "1.59.0")
6134)]
6135#[cfg_attr(
6136 target_arch = "arm",
6137 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6138)]
6139pub fn vcgtq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
6140 unsafe { simd_gt(a, b) }
6141}
6142#[doc = "Compare unsigned greater than"]
6143#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgt_u8)"]
6144#[inline]
6145#[target_feature(enable = "neon")]
6146#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6147#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))]
6148#[cfg_attr(
6149 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6150 assert_instr(cmhi)
6151)]
6152#[cfg_attr(
6153 not(target_arch = "arm"),
6154 stable(feature = "neon_intrinsics", since = "1.59.0")
6155)]
6156#[cfg_attr(
6157 target_arch = "arm",
6158 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6159)]
6160pub fn vcgt_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
6161 unsafe { simd_gt(a, b) }
6162}
6163#[doc = "Compare unsigned greater than"]
6164#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtq_u8)"]
6165#[inline]
6166#[target_feature(enable = "neon")]
6167#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6168#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))]
6169#[cfg_attr(
6170 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6171 assert_instr(cmhi)
6172)]
6173#[cfg_attr(
6174 not(target_arch = "arm"),
6175 stable(feature = "neon_intrinsics", since = "1.59.0")
6176)]
6177#[cfg_attr(
6178 target_arch = "arm",
6179 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6180)]
6181pub fn vcgtq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
6182 unsafe { simd_gt(a, b) }
6183}
6184#[doc = "Compare unsigned greater than"]
6185#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgt_u16)"]
6186#[inline]
6187#[target_feature(enable = "neon")]
6188#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6189#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))]
6190#[cfg_attr(
6191 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6192 assert_instr(cmhi)
6193)]
6194#[cfg_attr(
6195 not(target_arch = "arm"),
6196 stable(feature = "neon_intrinsics", since = "1.59.0")
6197)]
6198#[cfg_attr(
6199 target_arch = "arm",
6200 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6201)]
6202pub fn vcgt_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
6203 unsafe { simd_gt(a, b) }
6204}
6205#[doc = "Compare unsigned greater than"]
6206#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtq_u16)"]
6207#[inline]
6208#[target_feature(enable = "neon")]
6209#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6210#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))]
6211#[cfg_attr(
6212 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6213 assert_instr(cmhi)
6214)]
6215#[cfg_attr(
6216 not(target_arch = "arm"),
6217 stable(feature = "neon_intrinsics", since = "1.59.0")
6218)]
6219#[cfg_attr(
6220 target_arch = "arm",
6221 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6222)]
6223pub fn vcgtq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
6224 unsafe { simd_gt(a, b) }
6225}
6226#[doc = "Compare unsigned greater than"]
6227#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgt_u32)"]
6228#[inline]
6229#[target_feature(enable = "neon")]
6230#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6231#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))]
6232#[cfg_attr(
6233 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6234 assert_instr(cmhi)
6235)]
6236#[cfg_attr(
6237 not(target_arch = "arm"),
6238 stable(feature = "neon_intrinsics", since = "1.59.0")
6239)]
6240#[cfg_attr(
6241 target_arch = "arm",
6242 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6243)]
6244pub fn vcgt_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
6245 unsafe { simd_gt(a, b) }
6246}
6247#[doc = "Compare unsigned greater than"]
6248#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtq_u32)"]
6249#[inline]
6250#[target_feature(enable = "neon")]
6251#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6252#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))]
6253#[cfg_attr(
6254 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6255 assert_instr(cmhi)
6256)]
6257#[cfg_attr(
6258 not(target_arch = "arm"),
6259 stable(feature = "neon_intrinsics", since = "1.59.0")
6260)]
6261#[cfg_attr(
6262 target_arch = "arm",
6263 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6264)]
6265pub fn vcgtq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
6266 unsafe { simd_gt(a, b) }
6267}
6268#[doc = "Floating-point compare greater than zero"]
6269#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtz_f16)"]
6270#[inline]
6271#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
6272#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f16"))]
6273#[cfg_attr(
6274 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6275 assert_instr(fcmgt)
6276)]
6277#[target_feature(enable = "neon,fp16")]
6278#[cfg_attr(
6279 not(target_arch = "arm"),
6280 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
6281)]
6282#[cfg_attr(
6283 target_arch = "arm",
6284 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6285)]
6286#[cfg(not(target_arch = "arm64ec"))]
6287pub fn vcgtz_f16(a: float16x4_t) -> uint16x4_t {
6288 let b: f16x4 = f16x4::new(0.0, 0.0, 0.0, 0.0);
6289 unsafe { simd_gt(a, transmute(b)) }
6290}
6291#[doc = "Floating-point compare greater than zero"]
6292#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcgtzq_f16)"]
6293#[inline]
6294#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
6295#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f16"))]
6296#[cfg_attr(
6297 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6298 assert_instr(fcmgt)
6299)]
6300#[target_feature(enable = "neon,fp16")]
6301#[cfg_attr(
6302 not(target_arch = "arm"),
6303 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
6304)]
6305#[cfg_attr(
6306 target_arch = "arm",
6307 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6308)]
6309#[cfg(not(target_arch = "arm64ec"))]
6310pub fn vcgtzq_f16(a: float16x8_t) -> uint16x8_t {
6311 let b: f16x8 = f16x8::new(0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0);
6312 unsafe { simd_gt(a, transmute(b)) }
6313}
6314#[doc = "Floating-point compare less than or equal"]
6315#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcle_f16)"]
6316#[inline]
6317#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
6318#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f16"))]
6319#[cfg_attr(
6320 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6321 assert_instr(fcmge)
6322)]
6323#[target_feature(enable = "neon,fp16")]
6324#[cfg_attr(
6325 not(target_arch = "arm"),
6326 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
6327)]
6328#[cfg_attr(
6329 target_arch = "arm",
6330 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6331)]
6332#[cfg(not(target_arch = "arm64ec"))]
6333pub fn vcle_f16(a: float16x4_t, b: float16x4_t) -> uint16x4_t {
6334 unsafe { simd_le(a, b) }
6335}
6336#[doc = "Floating-point compare less than or equal"]
6337#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcleq_f16)"]
6338#[inline]
6339#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
6340#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f16"))]
6341#[cfg_attr(
6342 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6343 assert_instr(fcmge)
6344)]
6345#[target_feature(enable = "neon,fp16")]
6346#[cfg_attr(
6347 not(target_arch = "arm"),
6348 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
6349)]
6350#[cfg_attr(
6351 target_arch = "arm",
6352 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6353)]
6354#[cfg(not(target_arch = "arm64ec"))]
6355pub fn vcleq_f16(a: float16x8_t, b: float16x8_t) -> uint16x8_t {
6356 unsafe { simd_le(a, b) }
6357}
6358#[doc = "Floating-point compare less than or equal"]
6359#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcle_f32)"]
6360#[inline]
6361#[target_feature(enable = "neon")]
6362#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6363#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))]
6364#[cfg_attr(
6365 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6366 assert_instr(fcmge)
6367)]
6368#[cfg_attr(
6369 not(target_arch = "arm"),
6370 stable(feature = "neon_intrinsics", since = "1.59.0")
6371)]
6372#[cfg_attr(
6373 target_arch = "arm",
6374 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6375)]
6376pub fn vcle_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t {
6377 unsafe { simd_le(a, b) }
6378}
6379#[doc = "Floating-point compare less than or equal"]
6380#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcleq_f32)"]
6381#[inline]
6382#[target_feature(enable = "neon")]
6383#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6384#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))]
6385#[cfg_attr(
6386 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6387 assert_instr(fcmge)
6388)]
6389#[cfg_attr(
6390 not(target_arch = "arm"),
6391 stable(feature = "neon_intrinsics", since = "1.59.0")
6392)]
6393#[cfg_attr(
6394 target_arch = "arm",
6395 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6396)]
6397pub fn vcleq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t {
6398 unsafe { simd_le(a, b) }
6399}
6400#[doc = "Compare signed less than or equal"]
6401#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcle_s8)"]
6402#[inline]
6403#[target_feature(enable = "neon")]
6404#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6405#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))]
6406#[cfg_attr(
6407 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6408 assert_instr(cmge)
6409)]
6410#[cfg_attr(
6411 not(target_arch = "arm"),
6412 stable(feature = "neon_intrinsics", since = "1.59.0")
6413)]
6414#[cfg_attr(
6415 target_arch = "arm",
6416 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6417)]
6418pub fn vcle_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t {
6419 unsafe { simd_le(a, b) }
6420}
6421#[doc = "Compare signed less than or equal"]
6422#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcleq_s8)"]
6423#[inline]
6424#[target_feature(enable = "neon")]
6425#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6426#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))]
6427#[cfg_attr(
6428 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6429 assert_instr(cmge)
6430)]
6431#[cfg_attr(
6432 not(target_arch = "arm"),
6433 stable(feature = "neon_intrinsics", since = "1.59.0")
6434)]
6435#[cfg_attr(
6436 target_arch = "arm",
6437 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6438)]
6439pub fn vcleq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t {
6440 unsafe { simd_le(a, b) }
6441}
6442#[doc = "Compare signed less than or equal"]
6443#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcle_s16)"]
6444#[inline]
6445#[target_feature(enable = "neon")]
6446#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6447#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))]
6448#[cfg_attr(
6449 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6450 assert_instr(cmge)
6451)]
6452#[cfg_attr(
6453 not(target_arch = "arm"),
6454 stable(feature = "neon_intrinsics", since = "1.59.0")
6455)]
6456#[cfg_attr(
6457 target_arch = "arm",
6458 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6459)]
6460pub fn vcle_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t {
6461 unsafe { simd_le(a, b) }
6462}
6463#[doc = "Compare signed less than or equal"]
6464#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcleq_s16)"]
6465#[inline]
6466#[target_feature(enable = "neon")]
6467#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6468#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))]
6469#[cfg_attr(
6470 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6471 assert_instr(cmge)
6472)]
6473#[cfg_attr(
6474 not(target_arch = "arm"),
6475 stable(feature = "neon_intrinsics", since = "1.59.0")
6476)]
6477#[cfg_attr(
6478 target_arch = "arm",
6479 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6480)]
6481pub fn vcleq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t {
6482 unsafe { simd_le(a, b) }
6483}
6484#[doc = "Compare signed less than or equal"]
6485#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcle_s32)"]
6486#[inline]
6487#[target_feature(enable = "neon")]
6488#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6489#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))]
6490#[cfg_attr(
6491 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6492 assert_instr(cmge)
6493)]
6494#[cfg_attr(
6495 not(target_arch = "arm"),
6496 stable(feature = "neon_intrinsics", since = "1.59.0")
6497)]
6498#[cfg_attr(
6499 target_arch = "arm",
6500 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6501)]
6502pub fn vcle_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t {
6503 unsafe { simd_le(a, b) }
6504}
6505#[doc = "Compare signed less than or equal"]
6506#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcleq_s32)"]
6507#[inline]
6508#[target_feature(enable = "neon")]
6509#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6510#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))]
6511#[cfg_attr(
6512 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6513 assert_instr(cmge)
6514)]
6515#[cfg_attr(
6516 not(target_arch = "arm"),
6517 stable(feature = "neon_intrinsics", since = "1.59.0")
6518)]
6519#[cfg_attr(
6520 target_arch = "arm",
6521 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6522)]
6523pub fn vcleq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t {
6524 unsafe { simd_le(a, b) }
6525}
6526#[doc = "Compare unsigned less than or equal"]
6527#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcle_u8)"]
6528#[inline]
6529#[target_feature(enable = "neon")]
6530#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6531#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))]
6532#[cfg_attr(
6533 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6534 assert_instr(cmhs)
6535)]
6536#[cfg_attr(
6537 not(target_arch = "arm"),
6538 stable(feature = "neon_intrinsics", since = "1.59.0")
6539)]
6540#[cfg_attr(
6541 target_arch = "arm",
6542 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6543)]
6544pub fn vcle_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t {
6545 unsafe { simd_le(a, b) }
6546}
6547#[doc = "Compare unsigned less than or equal"]
6548#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcleq_u8)"]
6549#[inline]
6550#[target_feature(enable = "neon")]
6551#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6552#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))]
6553#[cfg_attr(
6554 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6555 assert_instr(cmhs)
6556)]
6557#[cfg_attr(
6558 not(target_arch = "arm"),
6559 stable(feature = "neon_intrinsics", since = "1.59.0")
6560)]
6561#[cfg_attr(
6562 target_arch = "arm",
6563 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6564)]
6565pub fn vcleq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t {
6566 unsafe { simd_le(a, b) }
6567}
6568#[doc = "Compare unsigned less than or equal"]
6569#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcle_u16)"]
6570#[inline]
6571#[target_feature(enable = "neon")]
6572#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6573#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))]
6574#[cfg_attr(
6575 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6576 assert_instr(cmhs)
6577)]
6578#[cfg_attr(
6579 not(target_arch = "arm"),
6580 stable(feature = "neon_intrinsics", since = "1.59.0")
6581)]
6582#[cfg_attr(
6583 target_arch = "arm",
6584 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6585)]
6586pub fn vcle_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t {
6587 unsafe { simd_le(a, b) }
6588}
6589#[doc = "Compare unsigned less than or equal"]
6590#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcleq_u16)"]
6591#[inline]
6592#[target_feature(enable = "neon")]
6593#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6594#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))]
6595#[cfg_attr(
6596 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6597 assert_instr(cmhs)
6598)]
6599#[cfg_attr(
6600 not(target_arch = "arm"),
6601 stable(feature = "neon_intrinsics", since = "1.59.0")
6602)]
6603#[cfg_attr(
6604 target_arch = "arm",
6605 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6606)]
6607pub fn vcleq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t {
6608 unsafe { simd_le(a, b) }
6609}
6610#[doc = "Compare unsigned less than or equal"]
6611#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcle_u32)"]
6612#[inline]
6613#[target_feature(enable = "neon")]
6614#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6615#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))]
6616#[cfg_attr(
6617 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6618 assert_instr(cmhs)
6619)]
6620#[cfg_attr(
6621 not(target_arch = "arm"),
6622 stable(feature = "neon_intrinsics", since = "1.59.0")
6623)]
6624#[cfg_attr(
6625 target_arch = "arm",
6626 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6627)]
6628pub fn vcle_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t {
6629 unsafe { simd_le(a, b) }
6630}
6631#[doc = "Compare unsigned less than or equal"]
6632#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcleq_u32)"]
6633#[inline]
6634#[target_feature(enable = "neon")]
6635#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6636#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))]
6637#[cfg_attr(
6638 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6639 assert_instr(cmhs)
6640)]
6641#[cfg_attr(
6642 not(target_arch = "arm"),
6643 stable(feature = "neon_intrinsics", since = "1.59.0")
6644)]
6645#[cfg_attr(
6646 target_arch = "arm",
6647 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6648)]
6649pub fn vcleq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t {
6650 unsafe { simd_le(a, b) }
6651}
6652#[doc = "Floating-point compare less than or equal to zero"]
6653#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vclez_f16)"]
6654#[inline]
6655#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
6656#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcle.f16"))]
6657#[cfg_attr(
6658 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6659 assert_instr(fcmle)
6660)]
6661#[target_feature(enable = "neon,fp16")]
6662#[cfg_attr(
6663 not(target_arch = "arm"),
6664 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
6665)]
6666#[cfg_attr(
6667 target_arch = "arm",
6668 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6669)]
6670#[cfg(not(target_arch = "arm64ec"))]
6671pub fn vclez_f16(a: float16x4_t) -> uint16x4_t {
6672 let b: f16x4 = f16x4::new(0.0, 0.0, 0.0, 0.0);
6673 unsafe { simd_le(a, transmute(b)) }
6674}
6675#[doc = "Floating-point compare less than or equal to zero"]
6676#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vclezq_f16)"]
6677#[inline]
6678#[cfg_attr(target_arch = "arm", target_feature(enable = "v8"))]
6679#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcle.f16"))]
6680#[cfg_attr(
6681 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6682 assert_instr(fcmle)
6683)]
6684#[target_feature(enable = "neon,fp16")]
6685#[cfg_attr(
6686 not(target_arch = "arm"),
6687 stable(feature = "stdarch_neon_fp16", since = "1.94.0")
6688)]
6689#[cfg_attr(
6690 target_arch = "arm",
6691 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6692)]
6693#[cfg(not(target_arch = "arm64ec"))]
6694pub fn vclezq_f16(a: float16x8_t) -> uint16x8_t {
6695 let b: f16x8 = f16x8::new(0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0);
6696 unsafe { simd_le(a, transmute(b)) }
6697}
6698#[doc = "Count leading sign bits"]
6699#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcls_s8)"]
6700#[inline]
6701#[target_feature(enable = "neon")]
6702#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6703#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcls.s8"))]
6704#[cfg_attr(
6705 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6706 assert_instr(cls)
6707)]
6708#[cfg_attr(
6709 not(target_arch = "arm"),
6710 stable(feature = "neon_intrinsics", since = "1.59.0")
6711)]
6712#[cfg_attr(
6713 target_arch = "arm",
6714 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6715)]
6716pub fn vcls_s8(a: int8x8_t) -> int8x8_t {
6717 unsafe extern "unadjusted" {
6718 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vcls.v8i8")]
6719 #[cfg_attr(
6720 any(target_arch = "aarch64", target_arch = "arm64ec"),
6721 link_name = "llvm.aarch64.neon.cls.v8i8"
6722 )]
6723 fn _vcls_s8(a: int8x8_t) -> int8x8_t;
6724 }
6725 unsafe { _vcls_s8(a) }
6726}
6727#[doc = "Count leading sign bits"]
6728#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vclsq_s8)"]
6729#[inline]
6730#[target_feature(enable = "neon")]
6731#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6732#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcls.s8"))]
6733#[cfg_attr(
6734 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6735 assert_instr(cls)
6736)]
6737#[cfg_attr(
6738 not(target_arch = "arm"),
6739 stable(feature = "neon_intrinsics", since = "1.59.0")
6740)]
6741#[cfg_attr(
6742 target_arch = "arm",
6743 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6744)]
6745pub fn vclsq_s8(a: int8x16_t) -> int8x16_t {
6746 unsafe extern "unadjusted" {
6747 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vcls.v16i8")]
6748 #[cfg_attr(
6749 any(target_arch = "aarch64", target_arch = "arm64ec"),
6750 link_name = "llvm.aarch64.neon.cls.v16i8"
6751 )]
6752 fn _vclsq_s8(a: int8x16_t) -> int8x16_t;
6753 }
6754 unsafe { _vclsq_s8(a) }
6755}
6756#[doc = "Count leading sign bits"]
6757#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vcls_s16)"]
6758#[inline]
6759#[target_feature(enable = "neon")]
6760#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
6761#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcls.s16"))]
6762#[cfg_attr(
6763 all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
6764 assert_instr(cls)
6765)]
6766#[cfg_attr(
6767 not(target_arch = "arm"),
6768 stable(feature = "neon_intrinsics", since = "1.59.0")
6769)]
6770#[cfg_attr(
6771 target_arch = "arm",
6772 unstable(feature = "stdarch_arm_neon_intrinsics", issue = "111800")
6773)]
6774pub fn vcls_s16(a: int16x4_t) -> int16x4_t {
6775 unsafe extern "unadjusted" {
6776 #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vcls.v4i16")]
6777 #[cfg_attr(
6778 any(target_arch = "aarch64", target_arch = "arm64ec"),
6779 link_name = "llvm.aarch64.neon.cls.v4i16"
6780 )]
6781 fn _vcls_s16(a: int16x4_t) -> int16x4_t;
6782 }
6783 unsafe { _vcls_s16(a) }
6784}
6785#[doc = "Count leading sign bits"]