if ARCH_IXP42X

choice
	prompt "IXP42X Implementations"
	default MACH_NSLU2

config MACH_NSLU2
	bool "Linksys NSLU2"
	select ARCH_IXP420
	select USES_NOR_CFI
	select USES_NOR_BOOTFLASH
	select USES_IXP4XX_NPE_ETH
	select INLINE_PLATFORM_INITIALIZATION
	select INLINE_PLATFORM_INITIALIZATION_SDRAM_PRE_OVERRIDE

config MACH_NAS100D
	bool "Iomega NAS100D"
	select ARCH_IXP420
	select USES_NOR_CFI
	select USES_NOR_BOOTFLASH
	select INLINE_PLATFORM_INITIALIZATION
	select INLINE_PLATFORM_INITIALIZATION_SDRAM_PRE_OVERRIDE

config MACH_DSMG600
	bool "D-Link DSM-G600 RevA"
	select ARCH_IXP420
	select USES_NOR_CFI
	select USES_NOR_BOOTFLASH
	select INLINE_PLATFORM_INITIALIZATION
	select INLINE_PLATFORM_INITIALIZATION_SDRAM_PRE_OVERRIDE

config MACH_FSG3
	bool "Freecom FSG-3"
	select ARCH_IXP420
	select USES_NOR_CFI
	select USES_NOR_BOOTFLASH
	select INLINE_PLATFORM_INITIALIZATION
	select INLINE_PLATFORM_INITIALIZATION_SDRAM_PRE_OVERRIDE

config MACH_AVILA2347
	bool "Gateworks Avila 2347"
	select ARCH_IXP422
	select MACH_AVILA
	select USES_NOR_CFI
	select USES_NOR_BOOTFLASH
	select INLINE_PLATFORM_INITIALIZATION
	select INLINE_PLATFORM_INITIALIZATION_SDRAM_PRE_OVERRIDE

endchoice

choice
	prompt "CPU endian-ness"
	default USER_BIGENDIAN

config USER_DEFAULTENDIAN
	bool "Default Endian-ness"
	help
	  Use the endian-ness as set by the CPU on reset, or by the
	  first stage boot loader when APEX is the second stage.

config USER_BIGENDIAN
	bool "Big-Endian"
	select BIGENDIAN
	help
	  The endian-ness of the CPU is selectable at runtime.  Intel
	  has traditionally configured their XScale CPUs to use
	  big-ending byte ordering.  However, the real determinant of
	  the endian-ness is the runtime libraries and operating
	  system components.

	  Until version 1.5 of the Intel Access Library, only
	  big-endian mode was supported for the NPE (Network
	  Processing Element).  If you depend on the built-in MAC,
	  you'll probably continue to use big-endian mode.  If you use
	  an external ethernet device, e.g. USB, or if someone
	  successfully integrates the version 1.5 library into the
	  Linux kernel, you may be able to use little-endian mode.

config USER_LITTLEENDIAN
	bool "Little-Endian"
	select LITTLEENDIAN
	help
	  The endian-ness of the CPU is selectable at runtime.  Intel
	  has traditionally configured their XScale CPUs to use
	  big-ending byte ordering.

	  The CPU will default to little-endian mode, so this option
	  is usually not needed.  However, if APEX is a second-stage
	  loader and the first stage sets the CPU in big-endian mode
	  then this option is necessary to put the CPU back into
	  little-endian mode.

endchoice

menu "Platform Setup"

config ATAG_PHYS
	hex "Physical address for ATAGs list"
	default "0x00000100"
	depends on ATAG
	help
	  This is the address where APEX will construct the ATAG list
	  before starting the Linux kernel.  This address should be
	  within the first 16KiB of physical RAM.  Don't change this
	  value unless you know what you are doing. 

config ARCH_NUMBER
	int
	default 597 if MACH_NSLU2
	default 865 if MACH_NAS100D
	default 964 if MACH_DSMG600
	default 1091 if MACH_FSG3

config APEX_VMA
	hex "APEX runtime address"
	default "0x00200000"

config KERNEL_LMA
	hex "Kernel load address"
	default "0x00008000"

config USE_RAMDISK
	bool "Enable ramdisk options"
	help
	  This option doesn't enable the ramdisk, per se.  It enables
	  other configuration options that help setup a default
	  ramdisk.  The kernel command line and the APEX startup
	  commands may be overridden to perform the same steps.

	  There is a separate option in the Environment section that
	  controls whether or not APEX copies the ramdisk from flash
	  into RAM at startup.  That is where the ramdisk region is
	  defined.

config RAMDISK_LMA
	hex "Ramdisk load address"
	default "0x01000000"
	depends on USE_RAMDISK

config RAMDISK_SIZE
	hex "Ramdisk size"
	default "0x00400000"
	depends on USE_RAMDISK

config SDRAM_BANK0
	bool "Enable SDRAM bank 0"
	default y

config SDRAM_BANK1
	bool "Enable SDRAM bank 1"
	depends on SDRAM_BANK0

config SDRAM_BANK_LENGTH
	hex "Size, in bytes, of each SDRAM bank"
	default 0x02000000

config NOR_BUSWIDTH
	int "Width of NOR flash bus"
	default "16"
	
config NOR_BANK0
	bool "Enable NOR flash bank 0"
	default y

config NOR_BANK0_START
	hex "Physical address of NOR flash bank 0"
	default "0x50000000"
	depends on NOR_BANK0

config NOR_BANK0_LENGTH
	hex "Size, in bytes, of NOR flash bank 0"
	default "0x00800000" if MACH_NSLU2
	depends on NOR_BANK0

config DISABLE_SECOND_UART_INIT
	bool "Disable initialization of second UART"
	help
	  The Linux kernel serial driver for the IXP42x doesn't enable
	  the UARTs.  This option prevents the secondary UART from be
	  enabled and, therefore, preventing it from being used by the
	  kernel.  In other words, setting this option to Y will
	  prevent Linux from using the second UART.

	  Best to leave this option as 'N' unless you have a good
	  reason to change it.

endmenu

config MACH
	string
	default "ixp42x"

config ARCH_IXP420
	bool
	select CPU_ARMV5
	select CPU_XSCALE

config ARCH_IXP422
	bool
	select CPU_ARMV5
	select CPU_XSCALE

config ARCH_IXP425
	bool
	select CPU_ARMV5
	select CPU_XSCALE

config MACH_AVILA
	bool
	select CPU_ARMV5
	select CPU_XSCALE

endif
