# NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --sort --version 6
# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1250 -disassemble -show-encoding < %s | FileCheck -strict-whitespace -check-prefix=GFX1250 %s

0x22,0xf8,0x81,0xb8
# GFX1250: s_getreg_b32 s1, hwreg(HW_REG_XNACK_MASK) ; encoding: [0x22,0xf8,0x81,0xb8]

0x21,0xf8,0x81,0xb8
# GFX1250: s_getreg_b32 s1, hwreg(HW_REG_XNACK_STATE_PRIV) ; encoding: [0x21,0xf8,0x81,0xb8]

0xe7,0x00,0x80,0xbe
# GFX1250: s_mov_b32 s0, src_flat_scratch_base_hi  ; encoding: [0xe7,0x00,0x80,0xbe]

0xe6,0x00,0x80,0xbe
# GFX1250: s_mov_b32 s0, src_flat_scratch_base_lo  ; encoding: [0xe6,0x00,0x80,0xbe]

0xe6,0x01,0x80,0xbe
# GFX1250: s_mov_b64 s[0:1], src_flat_scratch_base_lo ; encoding: [0xe6,0x01,0x80,0xbe]

0xeb,0x01,0x80,0xbe
# GFX1250: s_mov_b64 s[0:1], src_shared_base       ; encoding: [0xeb,0x01,0x80,0xbe]

0xec,0x01,0x80,0xbe
# GFX1250: s_mov_b64 s[0:1], src_shared_limit      ; encoding: [0xec,0x01,0x80,0xbe]

0x1c,0xf8,0x01,0xb9
# GFX1250: s_setreg_b32 hwreg(HW_REG_IB_STS2), s1  ; encoding: [0x1c,0xf8,0x01,0xb9]

0x22,0xf8,0x01,0xb9
# GFX1250: s_setreg_b32 hwreg(HW_REG_XNACK_MASK), s1 ; encoding: [0x22,0xf8,0x01,0xb9]

0x21,0xf8,0x01,0xb9
# GFX1250: s_setreg_b32 hwreg(HW_REG_XNACK_STATE_PRIV), s1 ; encoding: [0x21,0xf8,0x01,0xb9]
