require '_h2ph_pre.ph';

no warnings qw(redefine misc);

unless(defined(&_PCI_MLYREG_H_)) {
    eval 'sub _PCI_MLYREG_H_ () {1;}' unless defined(&_PCI_MLYREG_H_);
    eval 'sub MLY_MAX_CHANNELS () {6;}' unless defined(&MLY_MAX_CHANNELS);
    eval 'sub MLY_MAX_TARGETS () {16;}' unless defined(&MLY_MAX_TARGETS);
    eval 'sub MLY_MAX_LUNS () {1;}' unless defined(&MLY_MAX_LUNS);
    eval 'sub MLY_DEVICE_STATE_OFFLINE () {0x8;}' unless defined(&MLY_DEVICE_STATE_OFFLINE);
    eval 'sub MLY_DEVICE_STATE_UNCONFIGURED () {0x;}' unless defined(&MLY_DEVICE_STATE_UNCONFIGURED);
    eval 'sub MLY_DEVICE_STATE_ONLINE () {0x1;}' unless defined(&MLY_DEVICE_STATE_ONLINE);
    eval 'sub MLY_DEVICE_STATE_CRITICAL () {0x9;}' unless defined(&MLY_DEVICE_STATE_CRITICAL);
    eval 'sub MLY_DEVICE_STATE_WRITEONLY () {0x3;}' unless defined(&MLY_DEVICE_STATE_WRITEONLY);
    eval 'sub MLY_DEVICE_STATE_STANDBY () {0x21;}' unless defined(&MLY_DEVICE_STATE_STANDBY);
    eval 'sub MLY_DEVICE_STATE_MISSING () {0x4;}' unless defined(&MLY_DEVICE_STATE_MISSING);
    eval 'sub MLY_DEVICE_TYPE_RAID0 () {0x;}' unless defined(&MLY_DEVICE_TYPE_RAID0);
    eval 'sub MLY_DEVICE_TYPE_RAID1 () {0x1;}' unless defined(&MLY_DEVICE_TYPE_RAID1);
    eval 'sub MLY_DEVICE_TYPE_RAID3 () {0x3;}' unless defined(&MLY_DEVICE_TYPE_RAID3);
    eval 'sub MLY_DEVICE_TYPE_RAID5 () {0x5;}' unless defined(&MLY_DEVICE_TYPE_RAID5);
    eval 'sub MLY_DEVICE_TYPE_RAID6 () {0x6;}' unless defined(&MLY_DEVICE_TYPE_RAID6);
    eval 'sub MLY_DEVICE_TYPE_RAID7 () {0x7;}' unless defined(&MLY_DEVICE_TYPE_RAID7);
    eval 'sub MLY_DEVICE_TYPE_NEWSPAN () {0x8;}' unless defined(&MLY_DEVICE_TYPE_NEWSPAN);
    eval 'sub MLY_DEVICE_TYPE_RAID3F () {0x9;}' unless defined(&MLY_DEVICE_TYPE_RAID3F);
    eval 'sub MLY_DEVICE_TYPE_RAID3L () {0xb;}' unless defined(&MLY_DEVICE_TYPE_RAID3L);
    eval 'sub MLY_DEVICE_TYPE_SPAN () {0xc;}' unless defined(&MLY_DEVICE_TYPE_SPAN);
    eval 'sub MLY_DEVICE_TYPE_RAID5L () {0xd;}' unless defined(&MLY_DEVICE_TYPE_RAID5L);
    eval 'sub MLY_DEVICE_TYPE_RAIDE () {0xe;}' unless defined(&MLY_DEVICE_TYPE_RAIDE);
    eval 'sub MLY_DEVICE_TYPE_PHYSICAL () {0xf;}' unless defined(&MLY_DEVICE_TYPE_PHYSICAL);
    eval 'sub MLY_STRIPE_ZERO () {0x;}' unless defined(&MLY_STRIPE_ZERO);
    eval 'sub MLY_STRIPE_512b () {0x1;}' unless defined(&MLY_STRIPE_512b);
    eval 'sub MLY_STRIPE_1k () {0x2;}' unless defined(&MLY_STRIPE_1k);
    eval 'sub MLY_STRIPE_2k () {0x3;}' unless defined(&MLY_STRIPE_2k);
    eval 'sub MLY_STRIPE_4k () {0x4;}' unless defined(&MLY_STRIPE_4k);
    eval 'sub MLY_STRIPE_8k () {0x5;}' unless defined(&MLY_STRIPE_8k);
    eval 'sub MLY_STRIPE_16k () {0x6;}' unless defined(&MLY_STRIPE_16k);
    eval 'sub MLY_STRIPE_32k () {0x7;}' unless defined(&MLY_STRIPE_32k);
    eval 'sub MLY_STRIPE_64k () {0x8;}' unless defined(&MLY_STRIPE_64k);
    eval 'sub MLY_STRIPE_128k () {0x9;}' unless defined(&MLY_STRIPE_128k);
    eval 'sub MLY_STRIPE_256k () {0xa;}' unless defined(&MLY_STRIPE_256k);
    eval 'sub MLY_STRIPE_512k () {0xb;}' unless defined(&MLY_STRIPE_512k);
    eval 'sub MLY_STRIPE_1m () {0xc;}' unless defined(&MLY_STRIPE_1m);
    eval 'sub MLY_CACHELINE_ZERO () {0x;}' unless defined(&MLY_CACHELINE_ZERO);
    eval 'sub MLY_CACHELINE_512b () {0x1;}' unless defined(&MLY_CACHELINE_512b);
    eval 'sub MLY_CACHELINE_1k () {0x2;}' unless defined(&MLY_CACHELINE_1k);
    eval 'sub MLY_CACHELINE_2k () {0x3;}' unless defined(&MLY_CACHELINE_2k);
    eval 'sub MLY_CACHELINE_4k () {0x4;}' unless defined(&MLY_CACHELINE_4k);
    eval 'sub MLY_CACHELINE_8k () {0x5;}' unless defined(&MLY_CACHELINE_8k);
    eval 'sub MLY_CACHELINE_16k () {0x6;}' unless defined(&MLY_CACHELINE_16k);
    eval 'sub MLY_CACHELINE_32k () {0x7;}' unless defined(&MLY_CACHELINE_32k);
    eval 'sub MLY_CACHELINE_64k () {0x8;}' unless defined(&MLY_CACHELINE_64k);
    eval 'sub MLY_RWCtl_INITTED () {(1<<7);}' unless defined(&MLY_RWCtl_INITTED);
    eval 'sub MLY_RWCtl_WCD () {(0);}' unless defined(&MLY_RWCtl_WCD);
    eval 'sub MLY_RWCtl_WDISABLE () {(1<<3);}' unless defined(&MLY_RWCtl_WDISABLE);
    eval 'sub MLY_RWCtl_WCE () {(2<<3);}' unless defined(&MLY_RWCtl_WCE);
    eval 'sub MLY_RWCtl_IWCE () {(3<<3);}' unless defined(&MLY_RWCtl_IWCE);
    eval 'sub MLY_RWCtl_RCD () {(0);}' unless defined(&MLY_RWCtl_RCD);
    eval 'sub MLY_RWCtl_RCE () {(1);}' unless defined(&MLY_RWCtl_RCE);
    eval 'sub MLY_RWCtl_RAHEAD () {(2);}' unless defined(&MLY_RWCtl_RAHEAD);
    eval 'sub MLY_RWCtl_IRAHEAD () {(3);}' unless defined(&MLY_RWCtl_IRAHEAD);
    eval 'sub MLY_BIOSGEOM_2G () {0x;}' unless defined(&MLY_BIOSGEOM_2G);
    eval 'sub MLY_BIOSGEOM_8G () {0x1;}' unless defined(&MLY_BIOSGEOM_8G);
    eval 'sub MLY_OEM_MYLEX () {0x;}' unless defined(&MLY_OEM_MYLEX);
    eval 'sub MLY_OEM_IBM () {0x8;}' unless defined(&MLY_OEM_IBM);
    eval 'sub MLY_OEM_HP () {0xa;}' unless defined(&MLY_OEM_HP);
    eval 'sub MLY_OEM_DEC () {0xc;}' unless defined(&MLY_OEM_DEC);
    eval 'sub MLY_OEM_SIEMENS () {0x10;}' unless defined(&MLY_OEM_SIEMENS);
    eval 'sub MLY_OEM_INTEL () {0x12;}' unless defined(&MLY_OEM_INTEL);
    eval 'sub MLY_SPIN_AUTO () {0;}' unless defined(&MLY_SPIN_AUTO);
    eval 'sub MLY_SPIN_PWRSPIN () {1;}' unless defined(&MLY_SPIN_PWRSPIN);
    eval 'sub MLY_SPIN_WSSUSPIN () {2;}' unless defined(&MLY_SPIN_WSSUSPIN);
    eval 'sub MLY_STARTUP_IF_NO_CHANGE () {0x;}' unless defined(&MLY_STARTUP_IF_NO_CHANGE);
    eval 'sub MLY_STARTUP_IF_NO_LUN_CHANGE () {0x1;}' unless defined(&MLY_STARTUP_IF_NO_LUN_CHANGE);
    eval 'sub MLY_STARTUP_IF_NO_LUN_OFFLINE () {0x2;}' unless defined(&MLY_STARTUP_IF_NO_LUN_OFFLINE);
    eval 'sub MLY_STARTUP_IF_LUN0_NO_CHANGE () {0x3;}' unless defined(&MLY_STARTUP_IF_LUN0_NO_CHANGE);
    eval 'sub MLY_STARTUP_IF_LUN0_NOT_OFFLINE () {0x4;}' unless defined(&MLY_STARTUP_IF_LUN0_NOT_OFFLINE);
    eval 'sub MLY_STARTUP_ALWAYS () {0x5;}' unless defined(&MLY_STARTUP_ALWAYS);
    eval 'sub MLY_TIMEOUT_SECONDS () {0x;}' unless defined(&MLY_TIMEOUT_SECONDS);
    eval 'sub MLY_TIMEOUT_MINUTES () {0x40;}' unless defined(&MLY_TIMEOUT_MINUTES);
    eval 'sub MLY_TIMEOUT_HOURS () {0x80;}' unless defined(&MLY_TIMEOUT_HOURS);
    eval 'sub MLY_OPDEVICE_PHYSICAL_DEVICE () {0x;}' unless defined(&MLY_OPDEVICE_PHYSICAL_DEVICE);
    eval 'sub MLY_OPDEVICE_RAID_DEVICE () {0x1;}' unless defined(&MLY_OPDEVICE_RAID_DEVICE);
    eval 'sub MLY_OPDEVICE_PHYSICAL_CHANNEL () {0x2;}' unless defined(&MLY_OPDEVICE_PHYSICAL_CHANNEL);
    eval 'sub MLY_OPDEVICE_RAID_CHANNEL () {0x3;}' unless defined(&MLY_OPDEVICE_RAID_CHANNEL);
    eval 'sub MLY_OPDEVICE_PHYSICAL_CONTROLLER () {0x4;}' unless defined(&MLY_OPDEVICE_PHYSICAL_CONTROLLER);
    eval 'sub MLY_OPDEVICE_RAID_CONTROLLER () {0x5;}' unless defined(&MLY_OPDEVICE_RAID_CONTROLLER);
    eval 'sub MLY_OPDEVICE_CONFIGURATION_GROUP () {0x10;}' unless defined(&MLY_OPDEVICE_CONFIGURATION_GROUP);
    eval 'sub MLY_CMDCTL_FORCE_UNIT_ACCESS () {0x1;}' unless defined(&MLY_CMDCTL_FORCE_UNIT_ACCESS);
    eval 'sub MLY_CMDCTL_DISABLE_PAGE_OUT () {0x2;}' unless defined(&MLY_CMDCTL_DISABLE_PAGE_OUT);
    eval 'sub MLY_CMDCTL_EXTENDED_SG_TABLE () {0x8;}' unless defined(&MLY_CMDCTL_EXTENDED_SG_TABLE);
    eval 'sub MLY_CMDCTL_DATA_DIRECTION () {0x10;}' unless defined(&MLY_CMDCTL_DATA_DIRECTION);
    eval 'sub MLY_CMDCTL_NO_AUTO_SENSE () {0x40;}' unless defined(&MLY_CMDCTL_NO_AUTO_SENSE);
    eval 'sub MLY_CMDCTL_DISABLE_DISCONNECT () {0x80;}' unless defined(&MLY_CMDCTL_DISABLE_DISCONNECT);
    eval 'sub MDACMD_MEMCOPY () {0x1;}' unless defined(&MDACMD_MEMCOPY);
    eval 'sub MDACMD_SCSIPT () {0x2;}' unless defined(&MDACMD_SCSIPT);
    eval 'sub MDACMD_SCSILCPT () {0x3;}' unless defined(&MDACMD_SCSILCPT);
    eval 'sub MDACMD_SCSI () {0x4;}' unless defined(&MDACMD_SCSI);
    eval 'sub MDACMD_SCSILC () {0x5;}' unless defined(&MDACMD_SCSILC);
    eval 'sub MDACMD_IOCTL () {0x20;}' unless defined(&MDACMD_IOCTL);
    eval 'sub MDACMD_IOCTLCHECK () {0x23;}' unless defined(&MDACMD_IOCTLCHECK);
    eval 'sub MDACIOCTL_GETCONTROLLERINFO () {0x1;}' unless defined(&MDACIOCTL_GETCONTROLLERINFO);
    eval 'sub MDACIOCTL_GETLOGDEVINFOVALID () {0x3;}' unless defined(&MDACIOCTL_GETLOGDEVINFOVALID);
    eval 'sub MDACIOCTL_GETPHYSDEVINFOVALID () {0x5;}' unless defined(&MDACIOCTL_GETPHYSDEVINFOVALID);
    eval 'sub MDACIOCTL_GETCONTROLLERSTATISTICS () {0xb;}' unless defined(&MDACIOCTL_GETCONTROLLERSTATISTICS);
    eval 'sub MDACIOCTL_GETLOGDEVSTATISTICS () {0xd;}' unless defined(&MDACIOCTL_GETLOGDEVSTATISTICS);
    eval 'sub MDACIOCTL_GETPHYSDEVSTATISTICS () {0xf;}' unless defined(&MDACIOCTL_GETPHYSDEVSTATISTICS);
    eval 'sub MDACIOCTL_GETHEALTHSTATUS () {0x11;}' unless defined(&MDACIOCTL_GETHEALTHSTATUS);
    eval 'sub MDACIOCTL_GETEVENT () {0x15;}' unless defined(&MDACIOCTL_GETEVENT);
    eval 'sub MDACIOCTL_STOREIMAGE () {0x2c;}' unless defined(&MDACIOCTL_STOREIMAGE);
    eval 'sub MDACIOCTL_READIMAGE () {0x2d;}' unless defined(&MDACIOCTL_READIMAGE);
    eval 'sub MDACIOCTL_FLASHIMAGES () {0x2e;}' unless defined(&MDACIOCTL_FLASHIMAGES);
    eval 'sub MDACIOCTL_GET_SUBSYSTEM_DATA () {0x70;}' unless defined(&MDACIOCTL_GET_SUBSYSTEM_DATA);
    eval 'sub MDACIOCTL_SET_SUBSYSTEM_DATA () {0x71;}' unless defined(&MDACIOCTL_SET_SUBSYSTEM_DATA);
    eval 'sub MDACIOCTL_STARTDISOCVERY () {0x81;}' unless defined(&MDACIOCTL_STARTDISOCVERY);
    eval 'sub MDACIOCTL_SETRAIDDEVSTATE () {0x82;}' unless defined(&MDACIOCTL_SETRAIDDEVSTATE);
    eval 'sub MDACIOCTL_INITPHYSDEVSTART () {0x84;}' unless defined(&MDACIOCTL_INITPHYSDEVSTART);
    eval 'sub MDACIOCTL_INITPHYSDEVSTOP () {0x85;}' unless defined(&MDACIOCTL_INITPHYSDEVSTOP);
    eval 'sub MDACIOCTL_INITRAIDDEVSTART () {0x86;}' unless defined(&MDACIOCTL_INITRAIDDEVSTART);
    eval 'sub MDACIOCTL_INITRAIDDEVSTOP () {0x87;}' unless defined(&MDACIOCTL_INITRAIDDEVSTOP);
    eval 'sub MDACIOCTL_REBUILDRAIDDEVSTART () {0x88;}' unless defined(&MDACIOCTL_REBUILDRAIDDEVSTART);
    eval 'sub MDACIOCTL_REBUILDRAIDDEVSTOP () {0x89;}' unless defined(&MDACIOCTL_REBUILDRAIDDEVSTOP);
    eval 'sub MDACIOCTL_MAKECONSISTENTDATASTART () {0x8a;}' unless defined(&MDACIOCTL_MAKECONSISTENTDATASTART);
    eval 'sub MDACIOCTL_MAKECONSISTENTDATASTOP () {0x8b;}' unless defined(&MDACIOCTL_MAKECONSISTENTDATASTOP);
    eval 'sub MDACIOCTL_CONSISTENCYCHECKSTART () {0x8c;}' unless defined(&MDACIOCTL_CONSISTENCYCHECKSTART);
    eval 'sub MDACIOCTL_CONSISTENCYCHECKSTOP () {0x8d;}' unless defined(&MDACIOCTL_CONSISTENCYCHECKSTOP);
    eval 'sub MDACIOCTL_SETMEMORYMAILBOX () {0x8e;}' unless defined(&MDACIOCTL_SETMEMORYMAILBOX);
    eval 'sub MDACIOCTL_RESETDEVICE () {0x90;}' unless defined(&MDACIOCTL_RESETDEVICE);
    eval 'sub MDACIOCTL_FLUSHDEVICEDATA () {0x91;}' unless defined(&MDACIOCTL_FLUSHDEVICEDATA);
    eval 'sub MDACIOCTL_PAUSEDEVICE () {0x92;}' unless defined(&MDACIOCTL_PAUSEDEVICE);
    eval 'sub MDACIOCTL_UNPAUSEDEVICE () {0x93;}' unless defined(&MDACIOCTL_UNPAUSEDEVICE);
    eval 'sub MDACIOCTL_LOCATEDEVICE () {0x94;}' unless defined(&MDACIOCTL_LOCATEDEVICE);
    eval 'sub MDACIOCTL_SETMASTERSLAVEMODE () {0x95;}' unless defined(&MDACIOCTL_SETMASTERSLAVEMODE);
    eval 'sub MDACIOCTL_SETREALTIMECLOCK () {0xac;}' unless defined(&MDACIOCTL_SETREALTIMECLOCK);
    eval 'sub MDACIOCTL_CREATENEWCONF () {0xc0;}' unless defined(&MDACIOCTL_CREATENEWCONF);
    eval 'sub MDACIOCTL_DELETERAIDDEV () {0xc1;}' unless defined(&MDACIOCTL_DELETERAIDDEV);
    eval 'sub MDACIOCTL_REPLACEINTERNALDEV () {0xc2;}' unless defined(&MDACIOCTL_REPLACEINTERNALDEV);
    eval 'sub MDACIOCTL_RENAMERAIDDEV () {0xc3;}' unless defined(&MDACIOCTL_RENAMERAIDDEV);
    eval 'sub MDACIOCTL_ADDNEWCONF () {0xc4;}' unless defined(&MDACIOCTL_ADDNEWCONF);
    eval 'sub MDACIOCTL_XLATEPHYSDEVTORAIDDEV () {0xc5;}' unless defined(&MDACIOCTL_XLATEPHYSDEVTORAIDDEV);
    eval 'sub MDACIOCTL_MORE () {0xc6;}' unless defined(&MDACIOCTL_MORE);
    eval 'sub MDACIOCTL_SETPHYSDEVPARAMETER () {0xc8;}' unless defined(&MDACIOCTL_SETPHYSDEVPARAMETER);
    eval 'sub MDACIOCTL_GETPHYSDEVPARAMETER () {0xc9;}' unless defined(&MDACIOCTL_GETPHYSDEVPARAMETER);
    eval 'sub MDACIOCTL_CLEARCONF () {0xca;}' unless defined(&MDACIOCTL_CLEARCONF);
    eval 'sub MDACIOCTL_GETDEVCONFINFO () {0xcb;}' unless defined(&MDACIOCTL_GETDEVCONFINFO);
    eval 'sub MDACIOCTL_GETGROUPCONFINFO () {0xcc;}' unless defined(&MDACIOCTL_GETGROUPCONFINFO);
    eval 'sub MDACIOCTL_GETFREESPACELIST () {0xcd;}' unless defined(&MDACIOCTL_GETFREESPACELIST);
    eval 'sub MDACIOCTL_GETLOGDEVPARAMETER () {0xce;}' unless defined(&MDACIOCTL_GETLOGDEVPARAMETER);
    eval 'sub MDACIOCTL_SETLOGDEVPARAMETER () {0xcf;}' unless defined(&MDACIOCTL_SETLOGDEVPARAMETER);
    eval 'sub MDACIOCTL_GETCONTROLLERPARAMETER () {0xd0;}' unless defined(&MDACIOCTL_GETCONTROLLERPARAMETER);
    eval 'sub MDACIOCTL_SETCONTRLLERPARAMETER () {0xd1;}' unless defined(&MDACIOCTL_SETCONTRLLERPARAMETER);
    eval 'sub MDACIOCTL_CLEARCONFSUSPMODE () {0xd2;}' unless defined(&MDACIOCTL_CLEARCONFSUSPMODE);
    eval 'sub MDACIOCTL_GETBDT_FOR_SYSDRIVE () {0xe0;}' unless defined(&MDACIOCTL_GETBDT_FOR_SYSDRIVE);
    eval 'sub MLY_MAX_BDT_ENTRIES () {1022;}' unless defined(&MLY_MAX_BDT_ENTRIES);
    eval 'sub MLY_BBU_GETSTATUS () {0x;}' unless defined(&MLY_BBU_GETSTATUS);
    eval 'sub MLY_BBU_SET_THRESHOLD () {0x;}' unless defined(&MLY_BBU_SET_THRESHOLD);
    eval 'sub MLY_SUBSYSTEM_BBU () {0x1;}' unless defined(&MLY_SUBSYSTEM_BBU);
    eval 'sub MLY_BBU_TYPE_UNKNOWN () {0x;}' unless defined(&MLY_BBU_TYPE_UNKNOWN);
    eval 'sub MLY_BBU_TYPE_NICAD () {0x1;}' unless defined(&MLY_BBU_TYPE_NICAD);
    eval 'sub MLY_BBU_TYPE_MISSING () {0xfe;}' unless defined(&MLY_BBU_TYPE_MISSING);
    eval 'sub MLY_BBU_STATUS_NO_SYNC () {0x1;}' unless defined(&MLY_BBU_STATUS_NO_SYNC);
    eval 'sub MLY_BBU_STATUS_OUT_OF_SYNC () {0x2;}' unless defined(&MLY_BBU_STATUS_OUT_OF_SYNC);
    eval 'sub MLY_BBU_STATUS_FIRST_WARNING () {0x4;}' unless defined(&MLY_BBU_STATUS_FIRST_WARNING);
    eval 'sub MLY_BBU_STATUS_SECOND_WARNING () {0x8;}' unless defined(&MLY_BBU_STATUS_SECOND_WARNING);
    eval 'sub MLY_BBU_STATUS_RECONDITIONING () {0x10;}' unless defined(&MLY_BBU_STATUS_RECONDITIONING);
    eval 'sub MLY_BBU_STATUS_DISCHARGING () {0x20;}' unless defined(&MLY_BBU_STATUS_DISCHARGING);
    eval 'sub MLY_BBU_STATUS_FASTCHARGING () {0x40;}' unless defined(&MLY_BBU_STATUS_FASTCHARGING);
    eval 'sub MLY_PHYADDR {
        my($c, $b, $t, $l) = @_;
	    eval q((($l) | (($t) << 8) | (($b) << 16) | (($c) << 19)));
    }' unless defined(&MLY_PHYADDR);
    eval 'sub MLY_LOGADDR {
        my($c, $u) = @_;
	    eval q((($u) | (($c) << 19)));
    }' unless defined(&MLY_LOGADDR);
    eval 'sub MLY_LOGADDR_DEV {
        my($a) = @_;
	    eval q(($a & 0xffff));
    }' unless defined(&MLY_LOGADDR_DEV);
    eval 'sub MLY_LOGADDR_CTLR {
        my($a) = @_;
	    eval q(($a >> 19));
    }' unless defined(&MLY_LOGADDR_CTLR);
    eval 'sub MLY_PHYADDR_LUN {
        my($a) = @_;
	    eval q(($a & 0xff));
    }' unless defined(&MLY_PHYADDR_LUN);
    eval 'sub MLY_PHYADDR_TARGET {
        my($a) = @_;
	    eval q((($a >> 8) & 0xff));
    }' unless defined(&MLY_PHYADDR_TARGET);
    eval 'sub MLY_PHYADDR_CHANNEL {
        my($a) = @_;
	    eval q((($a >> 16) & 0x7));
    }' unless defined(&MLY_PHYADDR_CHANNEL);
    eval 'sub MLY_PHYADDR_CTLR {
        my($a) = @_;
	    eval q((($a >> 19) & 0x1f));
    }' unless defined(&MLY_PHYADDR_CTLR);
    eval 'sub MLY_CMD_SCSI_SMALL_CDB () {10;}' unless defined(&MLY_CMD_SCSI_SMALL_CDB);
    eval 'sub MLY_I960RX_COMMAND_MAILBOX () {0x10;}' unless defined(&MLY_I960RX_COMMAND_MAILBOX);
    eval 'sub MLY_I960RX_STATUS_MAILBOX () {0x18;}' unless defined(&MLY_I960RX_STATUS_MAILBOX);
    eval 'sub MLY_I960RX_IDBR () {0x20;}' unless defined(&MLY_I960RX_IDBR);
    eval 'sub MLY_I960RX_ODBR () {0x2c;}' unless defined(&MLY_I960RX_ODBR);
    eval 'sub MLY_I960RX_ERROR_STATUS () {0x2e;}' unless defined(&MLY_I960RX_ERROR_STATUS);
    eval 'sub MLY_I960RX_INTERRUPT_STATUS () {0x30;}' unless defined(&MLY_I960RX_INTERRUPT_STATUS);
    eval 'sub MLY_I960RX_INTERRUPT_MASK () {0x34;}' unless defined(&MLY_I960RX_INTERRUPT_MASK);
    eval 'sub MLY_STRONGARM_COMMAND_MAILBOX () {0x50;}' unless defined(&MLY_STRONGARM_COMMAND_MAILBOX);
    eval 'sub MLY_STRONGARM_STATUS_MAILBOX () {0x58;}' unless defined(&MLY_STRONGARM_STATUS_MAILBOX);
    eval 'sub MLY_STRONGARM_IDBR () {0x60;}' unless defined(&MLY_STRONGARM_IDBR);
    eval 'sub MLY_STRONGARM_ODBR () {0x61;}' unless defined(&MLY_STRONGARM_ODBR);
    eval 'sub MLY_STRONGARM_ERROR_STATUS () {0x63;}' unless defined(&MLY_STRONGARM_ERROR_STATUS);
    eval 'sub MLY_STRONGARM_INTERRUPT_STATUS () {0x30;}' unless defined(&MLY_STRONGARM_INTERRUPT_STATUS);
    eval 'sub MLY_STRONGARM_INTERRUPT_MASK () {0x34;}' unless defined(&MLY_STRONGARM_INTERRUPT_MASK);
    eval 'sub MLY_HM_CMDSENT () {(1<<0);}' unless defined(&MLY_HM_CMDSENT);
    eval 'sub MLY_HM_STSACK () {(1<<1);}' unless defined(&MLY_HM_STSACK);
    eval 'sub MLY_SOFT_RST () {(1<<3);}' unless defined(&MLY_SOFT_RST);
    eval 'sub MLY_AM_CMDSENT () {(1<<4);}' unless defined(&MLY_AM_CMDSENT);
    eval 'sub MLY_HM_STSREADY () {(1<<0);}' unless defined(&MLY_HM_STSREADY);
    eval 'sub MLY_AM_STSREADY () {(1<<1);}' unless defined(&MLY_AM_STSREADY);
    eval 'sub MLY_MSG_EMPTY () {(1<<3);}' unless defined(&MLY_MSG_EMPTY);
    eval 'sub MLY_MSG_SPINUP () {0x8;}' unless defined(&MLY_MSG_SPINUP);
    eval 'sub MLY_MSG_RACE_RECOVERY_FAIL () {0x60;}' unless defined(&MLY_MSG_RACE_RECOVERY_FAIL);
    eval 'sub MLY_MSG_RACE_IN_PROGRESS () {0x70;}' unless defined(&MLY_MSG_RACE_IN_PROGRESS);
    eval 'sub MLY_MSG_RACE_ON_CRITICAL () {0xb0;}' unless defined(&MLY_MSG_RACE_ON_CRITICAL);
    eval 'sub MLY_MSG_PARITY_ERROR () {0xf0;}' unless defined(&MLY_MSG_PARITY_ERROR);
    eval 'sub MLY_INTERRUPT_MASK_DISABLE () {0xff;}' unless defined(&MLY_INTERRUPT_MASK_DISABLE);
    eval 'sub MLY_INTERRUPT_MASK_ENABLE () {(0xff & ~(1<<2));}' unless defined(&MLY_INTERRUPT_MASK_ENABLE);
    eval 'sub MLY_MMBOX_COMMANDS () {64;}' unless defined(&MLY_MMBOX_COMMANDS);
    eval 'sub MLY_MMBOX_STATUS () {512;}' unless defined(&MLY_MMBOX_STATUS);
}
1;
