require '_h2ph_pre.ph';

no warnings qw(redefine misc);

unless(defined(&_ARM_MCONTEXT_H_)) {
    eval 'sub _ARM_MCONTEXT_H_ () {1;}' unless defined(&_ARM_MCONTEXT_H_);
    require 'sys/stdint.ph';
    if(defined(&__aarch64__)) {
	eval 'sub _NGREG () {35;}' unless defined(&_NGREG);
	eval 'sub _NGREG32 () {17;}' unless defined(&_NGREG32);
    }
 elsif(defined(&__arm__)) {
	eval 'sub _NGREG () {17;}' unless defined(&_NGREG);
    }
    eval 'sub _REG_R0 () {0;}' unless defined(&_REG_R0);
    eval 'sub _REG_R1 () {1;}' unless defined(&_REG_R1);
    eval 'sub _REG_R2 () {2;}' unless defined(&_REG_R2);
    eval 'sub _REG_R3 () {3;}' unless defined(&_REG_R3);
    eval 'sub _REG_R4 () {4;}' unless defined(&_REG_R4);
    eval 'sub _REG_R5 () {5;}' unless defined(&_REG_R5);
    eval 'sub _REG_R6 () {6;}' unless defined(&_REG_R6);
    eval 'sub _REG_R7 () {7;}' unless defined(&_REG_R7);
    eval 'sub _REG_R8 () {8;}' unless defined(&_REG_R8);
    eval 'sub _REG_R9 () {9;}' unless defined(&_REG_R9);
    eval 'sub _REG_R10 () {10;}' unless defined(&_REG_R10);
    eval 'sub _REG_R11 () {11;}' unless defined(&_REG_R11);
    eval 'sub _REG_R12 () {12;}' unless defined(&_REG_R12);
    eval 'sub _REG_R13 () {13;}' unless defined(&_REG_R13);
    eval 'sub _REG_R14 () {14;}' unless defined(&_REG_R14);
    eval 'sub _REG_R15 () {15;}' unless defined(&_REG_R15);
    eval 'sub _REG_CPSR () {16;}' unless defined(&_REG_CPSR);
    eval 'sub _REG_X0 () {0;}' unless defined(&_REG_X0);
    eval 'sub _REG_X1 () {1;}' unless defined(&_REG_X1);
    eval 'sub _REG_X2 () {2;}' unless defined(&_REG_X2);
    eval 'sub _REG_X3 () {3;}' unless defined(&_REG_X3);
    eval 'sub _REG_X4 () {4;}' unless defined(&_REG_X4);
    eval 'sub _REG_X5 () {5;}' unless defined(&_REG_X5);
    eval 'sub _REG_X6 () {6;}' unless defined(&_REG_X6);
    eval 'sub _REG_X7 () {7;}' unless defined(&_REG_X7);
    eval 'sub _REG_X8 () {8;}' unless defined(&_REG_X8);
    eval 'sub _REG_X9 () {9;}' unless defined(&_REG_X9);
    eval 'sub _REG_X10 () {10;}' unless defined(&_REG_X10);
    eval 'sub _REG_X11 () {11;}' unless defined(&_REG_X11);
    eval 'sub _REG_X12 () {12;}' unless defined(&_REG_X12);
    eval 'sub _REG_X13 () {13;}' unless defined(&_REG_X13);
    eval 'sub _REG_X14 () {14;}' unless defined(&_REG_X14);
    eval 'sub _REG_X15 () {15;}' unless defined(&_REG_X15);
    eval 'sub _REG_X16 () {16;}' unless defined(&_REG_X16);
    eval 'sub _REG_X17 () {17;}' unless defined(&_REG_X17);
    eval 'sub _REG_X18 () {18;}' unless defined(&_REG_X18);
    eval 'sub _REG_X19 () {19;}' unless defined(&_REG_X19);
    eval 'sub _REG_X20 () {20;}' unless defined(&_REG_X20);
    eval 'sub _REG_X21 () {21;}' unless defined(&_REG_X21);
    eval 'sub _REG_X22 () {22;}' unless defined(&_REG_X22);
    eval 'sub _REG_X23 () {23;}' unless defined(&_REG_X23);
    eval 'sub _REG_X24 () {24;}' unless defined(&_REG_X24);
    eval 'sub _REG_X25 () {25;}' unless defined(&_REG_X25);
    eval 'sub _REG_X26 () {26;}' unless defined(&_REG_X26);
    eval 'sub _REG_X27 () {27;}' unless defined(&_REG_X27);
    eval 'sub _REG_X28 () {28;}' unless defined(&_REG_X28);
    eval 'sub _REG_X29 () {29;}' unless defined(&_REG_X29);
    eval 'sub _REG_X30 () {30;}' unless defined(&_REG_X30);
    eval 'sub _REG_X31 () {31;}' unless defined(&_REG_X31);
    eval 'sub _REG_ELR () {32;}' unless defined(&_REG_ELR);
    eval 'sub _REG_SPSR () {33;}' unless defined(&_REG_SPSR);
    eval 'sub _REG_TPIDR () {34;}' unless defined(&_REG_TPIDR);
    if(defined(&__aarch64__)) {
	eval 'sub _REG_RV () { &_REG_X0;}' unless defined(&_REG_RV);
	eval 'sub _REG_FP () { &_REG_X29;}' unless defined(&_REG_FP);
	eval 'sub _REG_LR () { &_REG_X30;}' unless defined(&_REG_LR);
	eval 'sub _REG_SP () { &_REG_X31;}' unless defined(&_REG_SP);
	eval 'sub _REG_PC () { &_REG_ELR;}' unless defined(&_REG_PC);
    }
 elsif(defined(&__arm__)) {
	eval 'sub _REG_RV () { &_REG_R0;}' unless defined(&_REG_RV);
	eval 'sub _REG_FP () { &_REG_R11;}' unless defined(&_REG_FP);
	eval 'sub _REG_SP () { &_REG_R13;}' unless defined(&_REG_SP);
	eval 'sub _REG_LR () { &_REG_R14;}' unless defined(&_REG_LR);
	eval 'sub _REG_PC () { &_REG_R15;}' unless defined(&_REG_PC);
    }
    if(defined(&__aarch64__)) {
	eval 'sub _NFREG () {32;}' unless defined(&_NFREG);
	if(1) {
	} else {
	}
    }
 elsif(defined(&__arm__)) {
	if(defined(&__ARM_EABI__)) {
	} else {
	}
	eval 'sub _UC_MACHINE_PAD () {1;}' unless defined(&_UC_MACHINE_PAD);
	if(defined(&__ARM_EABI__)) {
	    eval 'sub __UCONTEXT_SIZE () {(256+ 144);}' unless defined(&__UCONTEXT_SIZE);
	} else {
	    eval 'sub __UCONTEXT_SIZE () {256;}' unless defined(&__UCONTEXT_SIZE);
	}
    }
    if(defined(&_RTLD_SOURCE) || defined(&_LIBC_SOURCE) || defined(&__LIBPTHREAD_SOURCE__)) {
	require 'sys/tls.ph';
	if(defined(&__aarch64__)) {
	    eval 'sub __lwp_getprivate_fast {
	        my($void) = @_;
    		eval q({ $void * &__tpidr;  &__asm  &__volatile(\\"mrs\\\\t%0, tpidr_el0\\" : \\"=r\\"( &__tpidr));  &__tpidr; });
	    }' unless defined(&__lwp_getprivate_fast);
	}
 elsif(defined(&__arm__)) {
# some #ifdef were dropped here -- fill in the blanks
	    eval 'sub __lwp_getprivate_fast {
	        my($void) = @_;
    		eval q({ });
	    }' unless defined(&__lwp_getprivate_fast);
	}
    }
    eval 'sub _UC_TLSBASE () {0x80000;}' unless defined(&_UC_TLSBASE);
    eval 'sub _UC_ARM_VFP () {0x10000;}' unless defined(&_UC_ARM_VFP);
    eval 'sub _UC_SETSTACK () {0x20000;}' unless defined(&_UC_SETSTACK);
    eval 'sub _UC_CLRSTACK () {0x40000;}' unless defined(&_UC_CLRSTACK);
    eval 'sub _UC_MACHINE_SP {
        my($uc) = @_;
	    eval q((($uc)-> ($uc_mcontext->{__gregs[&_REG_SP]})));
    }' unless defined(&_UC_MACHINE_SP);
    eval 'sub _UC_MACHINE_FP {
        my($uc) = @_;
	    eval q((($uc)-> ($uc_mcontext->{__gregs[&_REG_FP]})));
    }' unless defined(&_UC_MACHINE_FP);
    eval 'sub _UC_MACHINE_PC {
        my($uc) = @_;
	    eval q((($uc)-> ($uc_mcontext->{__gregs[&_REG_PC]})));
    }' unless defined(&_UC_MACHINE_PC);
    eval 'sub _UC_MACHINE_INTRV {
        my($uc) = @_;
	    eval q((($uc)-> ($uc_mcontext->{__gregs[&_REG_RV]})));
    }' unless defined(&_UC_MACHINE_INTRV);
    eval 'sub _UC_MACHINE_SET_PC {
        my($uc, $pc) = @_;
	    eval q( &_UC_MACHINE_PC($uc) = ($pc));
    }' unless defined(&_UC_MACHINE_SET_PC);
    if(defined(&_KERNEL)) {
    }
}
1;
