% configuration for basic tests --- still under construction
memaddresstime 3
memreadtime 10 memwritetime 10
membusbytes 16
branchpredictbits 2
branchaddressbits 6
branchhistorybits 3
branchdualbits 3
memchunksmax 100
hashprime 127
Scache blocksize 64
Scache setsize 2048
Scache associativity 4 pseudolru
Scache accesstime 2
Dcache blocksize 32
Dcache setsize 512
Dcache victimsize 8
Icache blocksize 32
Icache setsize 256
Icache victimsize 4
DTcache associativity 4 lru
unit BIT1 000000000000000000000000000000000000000000000000ffff00ff00ffc004
unit ALU1 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
unit ALU2 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
unit ALU3 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
unit ALU4 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
unit ALU5 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
unit ALU6 00000000ffffffffffffffffffffffff0000000300000003fffffffffffffffe
unit LSU1 00000000000000000000000000000000fffffffcfffffffc0000000000000000
unit LSU2 00000000000000000000000000000000fffffffcfffffffc0000000000000000
unit LSU3 00000000000000000000000000000000fffffffcfffffffc0000000000000000
unit MUL1 000080f000000000000000000000000000000000000000000000000000000000
unit DIV1 00000c0f00000000000000000000000000000000000000000000000000000000
unit FPU1 7fff730000000000000000000000000000000000000000000000000000000000
dispatchmax 3
commitmax 3
fetchmax 4
memslots 8
renameregs 20
reorderbuffer 40
Dcache writeallocate 1
Scache writeallocate 1
Dcache writeback 1
Scache writeback 1
Dcache ports 2
DTcache ports 2
writebuffer 8
writeholdingtime 3
mul0 1
mul1 2
mul2 2 2 1
mul3 2 2 2 1
mul4 2 2 2 2 2
mul5 2 2 2 2 2
mul6 2 2 2 2 2
mul7 2 2 2 2 2
mul8 2 2 2 2 2
div 10 10 10 10 10 10
fadd 1 1 1 1
fmul 1 1 1 1
fdiv 10 10 10 10
fsqrt 10 10 10 10
feps 1 1 1 1
fix 1 1
flot 1 1

